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From: "qinzhao at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/103271] ICE in assign_stack_temp_for_type with
 -ftrivial-auto-var-init=pattern and VLAs and -mno-strict-align on riscv64
Date: Thu, 02 Dec 2021 22:19:37 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103271

--- Comment #17 from qinzhao at gcc dot gnu.org ---
(In reply to Richard Biener from comment #12)
> diff --git a/gcc/internal-fn.c b/gcc/internal-fn.c
> index 6ac3460d538..08f94b7a17a 100644
> --- a/gcc/internal-fn.c
> +++ b/gcc/internal-fn.c
> @@ -3050,6 +3050,23 @@ expand_DEFERRED_INIT (internal_fn, gcall *stmt)
>         lhs_base =3D TREE_OPERAND (lhs_base, 0);
>        reg_lhs =3D (mem_ref_refers_to_non_mem_p (lhs_base)
>                  || non_mem_decl_p (lhs_base));
> +      /* If this expands to a register and the underlying decl is wrappe=
d in
> +        a MEM_REF that just serves as an access type change expose the d=
ecl
> +        if it is of correct size.  This avoids a situation as in PR103271
> +        if the target does not support a direct move to the registers mo=
de.
> */
> +      if (reg_lhs
> +         && TREE_CODE (lhs_base) =3D=3D MEM_REF
> +         && TREE_CODE (TREE_OPERAND (lhs_base, 0)) =3D=3D ADDR_EXPR
> +         && DECL_P (TREE_OPERAND (TREE_OPERAND (lhs_base, 0), 0))
> +         && integer_zerop (TREE_OPERAND (lhs_base, 1))
> +         && tree_fits_uhwi_p (var_size)
> +         && tree_int_cst_equal
> +              (var_size,
> +               DECL_SIZE_UNIT (TREE_OPERAND (TREE_OPERAND (lhs_base, 0),
> 0))))
> +       {
> +         lhs =3D TREE_OPERAND (TREE_OPERAND (lhs_base, 0), 0);
> +         var_type =3D TREE_TYPE (lhs);
> +       }
>      }
>=20=20
>    if (!reg_lhs)
>=20
> solves the issue.  There might be a situation where that's not enough tho=
ugh,
> I'm giving the above some testing.
this patch is so specific to target this specific case, I am wondering whet=
her
this is needed if Tim will provide a patch to support MOVTI in riscv backen=
d?=