From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 7A1963858D28; Thu, 2 Dec 2021 09:29:11 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7A1963858D28 From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/103271] ICE in assign_stack_temp_for_type with -ftrivial-auto-var-init=pattern and VLAs and -mno-strict-align on riscv64 Date: Thu, 02 Dec 2021 09:29:11 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: ice-on-valid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 Dec 2021 09:29:11 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103271 --- Comment #12 from Richard Biener --- diff --git a/gcc/internal-fn.c b/gcc/internal-fn.c index 6ac3460d538..08f94b7a17a 100644 --- a/gcc/internal-fn.c +++ b/gcc/internal-fn.c @@ -3050,6 +3050,23 @@ expand_DEFERRED_INIT (internal_fn, gcall *stmt) lhs_base =3D TREE_OPERAND (lhs_base, 0); reg_lhs =3D (mem_ref_refers_to_non_mem_p (lhs_base) || non_mem_decl_p (lhs_base)); + /* If this expands to a register and the underlying decl is wrapped = in + a MEM_REF that just serves as an access type change expose the decl + if it is of correct size. This avoids a situation as in PR103271 + if the target does not support a direct move to the registers mode= .=20 */ + if (reg_lhs + && TREE_CODE (lhs_base) =3D=3D MEM_REF + && TREE_CODE (TREE_OPERAND (lhs_base, 0)) =3D=3D ADDR_EXPR + && DECL_P (TREE_OPERAND (TREE_OPERAND (lhs_base, 0), 0)) + && integer_zerop (TREE_OPERAND (lhs_base, 1)) + && tree_fits_uhwi_p (var_size) + && tree_int_cst_equal + (var_size, + DECL_SIZE_UNIT (TREE_OPERAND (TREE_OPERAND (lhs_base, 0), 0= )))) + { + lhs =3D TREE_OPERAND (TREE_OPERAND (lhs_base, 0), 0); + var_type =3D TREE_TYPE (lhs); + } } if (!reg_lhs) solves the issue. There might be a situation where that's not enough thoug= h, I'm giving the above some testing.=