From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id A5C203857C51; Thu, 25 Nov 2021 07:16:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A5C203857C51 From: "rguenther at suse dot de" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/103393] [12 Regression] Generating 256bit register usage with -mprefer-avx128 -mprefer-vector-width=128 Date: Thu, 25 Nov 2021 07:16:17 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenther at suse dot de X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Nov 2021 07:16:17 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103393 --- Comment #7 from rguenther at suse dot de --- On Thu, 25 Nov 2021, crazylht at gmail dot com wrote: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103393 >=20 > --- Comment #6 from Hongtao.liu --- > (In reply to Hongtao.liu from comment #5) > > (In reply to Richard Biener from comment #3) > > > (In reply to H.J. Lu from comment #2) > > > > (In reply to Richard Biener from comment #1) > > > > > It isn't the vectorizer but memmove inline expansion. I'm not su= re it's > > > > > really a bug, but there isn't a way to disable %ymm use besides d= isabling > > > > > AVX entirely. > > > > > HJ? > > > >=20 > > > > YMM move is generated by loop distribution which doesn't check > > > > TARGET_PREFER_AVX128. > > >=20 > > > I think it's generated by gimple_fold_builtin_memory_op which since R= ichards > > > changes accepts bigger now, up to MOVE_MAX * MOVE_RATIO and that ends= up > > > picking an integer mode via > > >=20 > > > scalar_int_mode mode; > > > if (int_mode_for_size (ilen * 8, 0).exists (&mode) > > > && GET_MODE_SIZE (mode) * BITS_PER_UNIT =3D=3D ilen= * 8 > > > && have_insn_for (SET, mode) > > > /* If the destination pointer is not aligned we mus= t be > > > able > > > to emit an unaligned store. */ > > > && (dest_align >=3D GET_MODE_ALIGNMENT (mode) > > > || !targetm.slow_unaligned_access (mode, dest_a= lign) > > > || (optab_handler (movmisalign_optab, mode) > > > !=3D CODE_FOR_nothing))) > > >=20 > > > not sure if there's another way to validate things. > >=20 > > For one single set operation, shouldn't the total size be less than MOV= E_MAX > > instead of MOVE_MAX * MOVE_RATIO? >=20 > r12-3482 change MOVE_MAX to MOVE_MAX * MOVE_RATIO Yes, IIRC it was specifically to allow vector register moves on aarch64/arm which doesn't seem to have a MOVE_MAX that exceeds WORD_SIZE. It looks like x86 carefully tries to have a MOVE_MAX that honors -mprefer-xxx as to not exceed a single move size. Both seem to be in conflict here. Richard - why could arm/aarch64 not increase MOVE_MAX here?=