From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 980823857C4A; Fri, 26 Nov 2021 13:38:32 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 980823857C4A From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug middle-end/103439] genemit emits dead code Date: Fri, 26 Nov 2021 13:38:32 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: middle-end X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Nov 2021 13:38:32 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103439 --- Comment #4 from Richard Biener --- (In reply to Uro=C5=A1 Bizjak from comment #3) > (In reply to rguenther@suse.de from comment #2) > > On Fri, 26 Nov 2021, ubizjak at gmail dot com wrote: > >=20 > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103439 > > >=20 > > > --- Comment #1 from Uro=C5=A1 Bizjak --- > > > (In reply to Richard Biener from comment #0) > > > > I'm not sure if there are valid cases where we have a mix of a dire= ct > > > > RTL pattern and manual expansion, so where the { } part falls thru. > > >=20 > > > Yes, we have quite some of them in e.g. i386.md, movstrict, ext= v, > > > extzv, insv and zero_extend expanders are some of them. > >=20 > > OK, so that's conditional FAILs. I've not yet found a conditional > > DONE that eventually falls through to a "DONE via the pattern". >=20 > Look at zero_extend and extend expanders. Indeed. (define_expand "zero_extendqihi2" [(set (match_operand:HI 0 "register_operand") (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand")))] "" { if (TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)) { operands[1] =3D force_reg (QImode, operands[1]); emit_insn (gen_zero_extendqihi2_and (operands[0], operands[1])); DONE; } }) and /* /home/rguenther/src/trunk/gcc/config/i386/i386.md:4120 */ rtx gen_zero_extendqihi2 (rtx operand0, rtx operand1) { rtx_insn *_val =3D 0; start_sequence (); { rtx operands[2]; operands[0] =3D operand0; operands[1] =3D operand1; #define FAIL return (end_sequence (), _val) #define DONE return (_val =3D get_insns (), end_sequence (), _val) #line 4124 "/home/rguenther/src/trunk/gcc/config/i386/i386.md" { if (TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)) { operands[1] =3D force_reg (QImode, operands[1]); emit_insn (gen_zero_extendqihi2_and (operands[0], operands[1])); DONE; } } #undef DONE #undef FAIL operand0 =3D operands[0]; (void) operand0; operand1 =3D operands[1]; (void) operand1; } emit_insn (gen_rtx_SET (operand0, gen_rtx_ZERO_EXTEND (HImode, operand1))); _val =3D get_insns (); end_sequence (); return _val; } so quite hard if not impossible to "fix" in genemit=