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From: "tnfchris at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug tree-optimization/103523] [11/12 Regression] SVE float
 auto-vect float format expand failure exposed by r11-7861-ge4180ab2f
Date: Mon, 06 Dec 2021 12:10:21 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103523

--- Comment #6 from Tamar Christina <tnfchris at gcc dot gnu.org> ---
Looks like the ICE is cause by a bug in `vectorizable_induction` not checki=
ng
for MULT_EXPR and PLUS_EXPR for the given type before it tries to emit them.

This then leads to veclower trying to lower the operation since it's not
supported and then this ICEs since veclower can only handle fixed-size vect=
ors.

The reason we generate this in the first place is due to the epilogue mask.

The main loop is vectorized using VNx4SF and we generate an epilogue for
VNx2SF.=