From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id B6A233858C60; Wed, 8 Dec 2021 07:10:55 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B6A233858C60 From: "ubizjak at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/103571] ABI: V2HF, V4HF and V8HFmode argument passing issues Date: Wed, 08 Dec 2021 07:10:55 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: ABI X-Bugzilla-Severity: normal X-Bugzilla-Who: ubizjak at gmail dot com X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Dec 2021 07:10:55 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103571 --- Comment #9 from Uro=C5=A1 Bizjak --- (In reply to Hongtao.liu from comment #8) > (In reply to Uro=C5=A1 Bizjak from comment #6) > > (In reply to Hongtao.liu from comment #5) > >=20 > > > There're several places in i386-expand.c which assume TARGET_AVX512FP= 16 for > > > case V8HF/V16HF/V32HF, if we want to put V8HF/V16HF/V32HF in > > > VALID_SSE2/AVX256/AVX512F_REG_MODE, we need to "fix" them first. > >=20 > > These are of the type: > >=20 > > use_vector_set =3D TARGET_AVX512FP16 && one_var =3D=3D 0; > > gen_vec_set_0 =3D gen_vec_setv8hf_0; > >=20 > > So they look immune to the above change. >=20 > This is ok. >=20 > I mean in ix86_expand_vector_init_duplicate >=20 > case E_V8HFmode: > case E_V16HFmode: > case E_V32HFmode: > return ix86_vector_duplicate_value (mode, target, val); >=20 > AVX2 is needed for V8HF/V16HFmode vpbroadcastw, AVX512BW is needed for > V32HFmode, those modes should be handled same as V8HI/V16HI/V32HImode. >=20 > Also in ix86_expand_vector_extract, below should be under TARGET_AVX512BW, > other wise, vector_extract go through stack. >=20 > case E_V32HFmode: > tmp =3D gen_reg_rtx (V16HFmode); > if (elt < 16) > emit_insn (gen_vec_extract_lo_v32hf (tmp, vec)); > else > emit_insn (gen_vec_extract_hi_v32hf (tmp, vec)); > ix86_expand_vector_extract (false, target, tmp, elt & 15); > return; >=20 >=20 > others seems to be ok. Please note that the change mainly affects moves between SSE and GP registe= rs. Expansion is done way before register allocation, and if we allow these mod= es earlier, I'm not sure I understand how it affects expand. I propose we proceed with my patch and fix eventual fallout as a follow-up.=