From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-bugzilla@gcc.gnu.org>
Received: by sourceware.org (Postfix, from userid 48)
 id 76D403858C39; Wed,  8 Dec 2021 01:04:44 +0000 (GMT)
DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 76D403858C39
From: "john_platts at hotmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/103611] GCC generates suboptimal code for SSE2/SSE4.1
 64-bit integer element extraction on 32-bit x86 targets
Date: Wed, 08 Dec 2021 01:04:44 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: target
X-Bugzilla-Version: 11.2.0
X-Bugzilla-Keywords: 
X-Bugzilla-Severity: normal
X-Bugzilla-Who: john_platts at hotmail dot com
X-Bugzilla-Status: UNCONFIRMED
X-Bugzilla-Resolution: 
X-Bugzilla-Priority: P3
X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org
X-Bugzilla-Target-Milestone: ---
X-Bugzilla-Flags: 
X-Bugzilla-Changed-Fields: 
Message-ID: <bug-103611-4-wQtE7y4XS4@http.gcc.gnu.org/bugzilla/>
In-Reply-To: <bug-103611-4@http.gcc.gnu.org/bugzilla/>
References: <bug-103611-4@http.gcc.gnu.org/bugzilla/>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/
Auto-Submitted: auto-generated
MIME-Version: 1.0
X-BeenThere: gcc-bugs@gcc.gnu.org
X-Mailman-Version: 2.1.29
Precedence: list
List-Id: Gcc-bugs mailing list <gcc-bugs.gcc.gnu.org>
List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-bugs>,
 <mailto:gcc-bugs-request@gcc.gnu.org?subject=unsubscribe>
List-Archive: <https://gcc.gnu.org/pipermail/gcc-bugs/>
List-Post: <mailto:gcc-bugs@gcc.gnu.org>
List-Help: <mailto:gcc-bugs-request@gcc.gnu.org?subject=help>
List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-bugs>,
 <mailto:gcc-bugs-request@gcc.gnu.org?subject=subscribe>
X-List-Received-Date: Wed, 08 Dec 2021 01:04:44 -0000

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103611

--- Comment #1 from John Platts <john_platts at hotmail dot com> ---
Here is some C++ code for extracting 64-bit integers from a __m128i vector
using SSE4.1:
#include <cstdint>
#include <immintrin.h>

template<int ElemIdx>
std::int64_t SSE41ExtractInt64(__m128i vect) noexcept {
    static_assert(ElemIdx =3D=3D (ElemIdx & 1), "ElemIdx must be between 0 =
and 1");

    std::uint32_t loVal;
    std::uint32_t hiVal;
    if constexpr(ElemIdx =3D=3D 0) {
        loVal =3D std::uint32_t(_mm_extract_epi32(vect, 0));
        hiVal =3D std::uint32_t(_mm_extract_epi32(vect, 1));
    } else {
        loVal =3D std::uint32_t(_mm_extract_epi32(vect, 2));
        hiVal =3D std::uint32_t(_mm_extract_epi32(vect, 3));
    }

    return std::int64_t(loVal) | std::int64_t(std::uint64_t(hiVal) << 32);
}

template std::int64_t SSE41ExtractInt64<0>(__m128i vect) noexcept;
template std::int64_t SSE41ExtractInt64<1>(__m128i vect) noexcept;

Here is the assembly code that is generated when the above C++ code is comp=
iled
with the -O2 -std=3Dc++17 -march=3Dcore2 -msse4.1 -mtune=3Dskylake -m32 opt=
ions:
_Z17SSE41ExtractInt64ILi0EExDv2_x:
        subl    $28, %esp
        pmovzxdq        %xmm0, %xmm1
        movq    %xmm1, 8(%esp)
        pextrd  $1, %xmm0, %eax
        movl    %eax, %edx
        movl    8(%esp), %eax
        orl     12(%esp), %edx
        orb     $0, %ah
        addl    $28, %esp
        ret
_Z17SSE41ExtractInt64ILi1EExDv2_x:
        pushl   %ebx
        pextrd  $2, %xmm0, %ecx
        psrldq  $12, %xmm0
        xorl    %ebx, %ebx
        movd    %xmm0, %edx
        movl    %ecx, %eax
        orl     %ebx, %edx
        orb     $0, %ah
        popl    %ebx
        ret

Here is more optimal code for the above functions:
_Z17SSE41ExtractInt64ILi0EExDv2_x:
        movd    %xmm0, %eax
        pextrd  $1, %xmm0, %edx
        ret
_Z17SSE41ExtractInt64ILi1EExDv2_x:
        pextrd  $2, %xmm0, %eax
        pextrd  $3, %xmm0, %edx
        ret

Here is the code that is generated when the above C++ code is compiled with
clang 13.0.0 with the -O2 -std=3Dc++17 -march=3Dcore2 -msse4.1 -mtune=3Dsky=
lake -m32
options:
_Z17SSE41ExtractInt64ILi0EExDv2_x:      # @_Z17SSE41ExtractInt64ILi0EExDv2_x
        movd    %xmm0, %eax
        pextrd  $1, %xmm0, %edx
        retl
_Z17SSE41ExtractInt64ILi1EExDv2_x:      # @_Z17SSE41ExtractInt64ILi1EExDv2_x
        extractps       $2, %xmm0, %eax
        extractps       $3, %xmm0, %edx
        retl=