From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 9084F3858406; Mon, 27 Dec 2021 06:36:19 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9084F3858406 From: "linkw at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/103623] [12 Regression] error: unable to generate reloads (ICE in curr_insn_transform, at lra-constraints.c:4132), or error: insn does not satisfy its constraints (ICE in extract_constrain_insn_cached, at recog.c:2682) Date: Mon, 27 Dec 2021 06:36:19 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: ice-on-invalid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: linkw at gcc dot gnu.org X-Bugzilla-Status: REOPENED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: wschmidt at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cf_reconfirmed_on Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Dec 2021 06:36:19 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103623 Kewen Lin changed: What |Removed |Added ---------------------------------------------------------------------------- Last reconfirmed|2021-12-10 00:00:00 |2021-12-27 --- Comment #21 from Kewen Lin --- > 1=EF=BC=89 (TARGET_LONG_DOUBLE_128 && TARGET_HARD_FLOAT && !TARGET_IEEEQU= AD) >=20 > this return false on your side, which is the flag used for previous bif > support. > Could you check all the values? >=20 > 2) FLOAT128_2REG_P (TFmode) >=20 > this return true on your side, and as the below defintion, >=20 > #define FLOAT128_2REG_P(MODE) \ > (FLOAT128_IBM_P (MODE) \ > || ((MODE) =3D=3D TDmode) \ > || (!TARGET_FLOAT128_TYPE && FLOAT128_IEEE_P (MODE))) >=20 > #define FLOAT128_IBM_P(MODE) \ > ((!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128 \ > && ((MODE) =3D=3D TFmode || (MODE) =3D=3D TCmode)) \ > || (TARGET_HARD_FLOAT && ((MODE) =3D=3D IFmode || (MODE) =3D=3D ICmode= ))) >=20 > Could you check which condition arm makes FLOAT128_2REG_P true on your si= de? After typing these checks, I just tried and realized that my local cross-bu= ild on ppc64le can reproduce this if I specify -mlong-double-128. So Arseny's l= ocal env make this option default as -mlong-double-128 while mine uses -mlong-double-64. Thanks Arseny! :) So confirmed.=