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From: "linkw at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/103623] [12 Regression] error: unable to generate
 reloads (ICE in curr_insn_transform, at lra-constraints.c:4132), or error:
 insn does not satisfy its constraints (ICE in extract_constrain_insn_cached,
 at recog.c:2682)
Date: Mon, 21 Feb 2022 03:03:03 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103623

--- Comment #31 from Kewen Lin <linkw at gcc dot gnu.org> ---
Thanks for the comments, Segher and Peter! Your comments answered my questi=
on
in mind that the current unpack/pack pattern supports are complete or not.
IIUC, to cover it for both soft-float and hard-float cases, we need to upda=
te
the bif documents and add more alternatives (like: register constraint r to
survive for soft-float). I'm wondering if it's allowed to be made in current
stage 4 (it's like a small feature extension)? Or we can "fix" it to keep i=
t as
the previous behavior at the first place and leave it to next stage 1?

As to question on __builtin_{un,}pack_ibm128, IIUC, __ibm128 type requires =
vsx
support which requires hard-float, it won't have the possibility to test it
with soft-float?=