From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 3558E3858402; Fri, 18 Feb 2022 21:57:42 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3558E3858402 From: "segher at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/103623] [12 Regression] error: unable to generate reloads (ICE in curr_insn_transform, at lra-constraints.c:4132), or error: insn does not satisfy its constraints (ICE in extract_constrain_insn_cached, at recog.c:2682) Date: Fri, 18 Feb 2022 21:57:41 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: accepts-invalid, ice-on-invalid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: segher at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: linkw at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2022 21:57:42 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103623 --- Comment #29 from Segher Boessenkool --- (In reply to Peter Bergner from comment #28) > (In reply to Segher Boessenkool from comment #27) > > OTOH, it makes no sense to test if we have hard float. The pack and un= pack > > builtins should work (and work the same) whenever long double is > > double-double. >=20 > Agreed. For soft-float, the value would be a a GPR pair versus a FPR pair > (for -m64). It's a little tricker for -m32 -msoft-float compiles, since a > 128-bit long double would live in 4 32-bit GPRs, so more regs than it tak= es > to hold them in FPRs. Not much of a complication, but just needs to be > tested on 32-bit to ensure it works as expected. It can be in memory, even; it doesn't matter. But it is boring data movement, and in many cases it doesn't generate any code even :-)=