From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 1C8053858D3C; Mon, 27 Dec 2021 13:33:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1C8053858D3C From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/103762] [12 Regression] glibc master branch is miscompiled by r12-897 Date: Mon, 27 Dec 2021 13:33:48 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: missed-optimization, patch, ra X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Dec 2021 13:33:48 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D103762 --- Comment #12 from CVS Commits --- The master branch has been updated by H.J. Lu : https://gcc.gnu.org/g:9407058a430316db5299bc7867e4a31f900cd197 commit r12-6122-g9407058a430316db5299bc7867e4a31f900cd197 Author: H.J. Lu Date: Sun Dec 19 08:47:03 2021 -0800 ix86: Don't use the 'm' constraint for x86_64_general_operand The 'm' constraint is defined with define_memory_constraint which allows LRA to convert the operand to the form '(mem (reg X))', where X is a base register. To prevent LRA from generating '(mem (reg X))' from a register: 1. Add a 'BM' constraint which is similar to the 'm' constraint, but is defined with define_constraint. 2. Add a 'm' mode attribute which is mapped to the 'm' constraint for general_operand and the 'BM' constraint for x86_64_general_operand. 3. Replace the 'm' constraint on with the '' constraint. 4. Replace the 'm' constraint on x86_64_general_operand with the 'BM' constraint. gcc/ PR target/103762 * config/i386/constraints.md (BM): New constraint. * config/i386/i386.md (m): New mode attribute. Replace the 'm' constraint on with the '' constraint. Replace the 'm' constraint on x86_64_general_operand with the 'BM' constraint. gcc/testsuite/ * gcc.target/i386/pr103762-1a.c: New test. * gcc.target/i386/pr103762-1b.c: Likewise. * gcc.target/i386/pr103762-1c.c: Likewise.=