From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 9109C3858D3C; Fri, 25 Mar 2022 12:00:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9109C3858D3C From: "jakub at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/104049] [12 Regression] vec_select to subreg lowering causes superfluous moves Date: Fri, 25 Mar 2022 12:00:00 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: missed-optimization, ra X-Bugzilla-Severity: normal X-Bugzilla-Who: jakub at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 Mar 2022 12:00:00 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D104049 Jakub Jelinek changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |jakub at gcc dot gnu.org, | |rsandifo at gcc dot gnu.org --- Comment #9 from Jakub Jelinek --- Perhaps the r12-2288-g8695bf78dad1a42636 change wasn't a good idea? I mean, if we add some hack for the .REDUC_* stuff so that we don't have the lowpart vec_select that r12-2288 folds into a subreg, won't we still suffer= the same problem when doing anything similar? E.g. with -O2: typedef int V __attribute__((vector_size (4 * sizeof (int)))); int test (V a) { int sum =3D a[0]; return (((unsigned short)sum) + ((unsigned int)sum >> 16)) >> 1; } The assembly difference is then: - fmov w0, s0 - lsr w1, w0, 16 - add w0, w1, w0, uxth + umov w0, v0.h[0] + fmov w1, s0 + add w0, w0, w1, lsr 16 lsr w0, w0, 1 ret Dunno how costly on aarch64 is Neon -> GPR register move. Is fmov w0, s0; fmov w1, s0 or fmov w0, s0; mov w1, w0 cheaper?=