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From: "vmakarov at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug rtl-optimization/104049] [12 Regression] vec_select to subreg
 lowering causes superfluous moves
Date: Tue, 18 Jan 2022 17:03:15 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D104049

--- Comment #3 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
(In reply to Richard Biener from comment #2)
> We need to understand the issue at least.

I think that it is not an RA problem.

IRA assigns quite reasonable registers.  LRA just generates 2 reloads for t=
his
test, one for insn *add_lsr_si which has only one alternative and one for i=
nsn
andsi3 which needs reload insns for any alternative and LRA in this case
chooses the best one.

I guess the problem of the code generation regression is in some recent cha=
nges
of combiner or most probably aarch64 machine dependent code directing the
combiner (as Tamar wrote).

It would be nice if somebody bisected and found what commit resulted in the
regression.

As for double transfer of the value, it could be removed by inheritance in =
LRA
but it is impossible as an input reload pseudo got the same hard register (=
in
LRA assignment subpass) as one of the insn output pseudo (the assignment was
done in IRA) and the reloaded value is still used in subsequent insn.=20=20
Unfortunately it can happen as RA can not make allocation and code selection
optimally in general case.

  Some coordination between LRA-assignment subpass and LRA-inheritance subp=
ass
could help to avoid the double transfer but right now I have no idea how to=
 do
this.  It is also dangerous to implement such coordination at this stage as
LRA-inheritance sub-pass is very complicated.=