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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug rtl-optimization/104059] [12 Regression] cprop_hardreg
 propgates hard registers for mov instructions between different REG_CLASS
 without considering cost
Date: Mon, 17 Jan 2022 04:56:12 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D104059

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |12.0
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2022-01-17
            Summary|cprop_hardreg propgates     |[12 Regression]
                   |hard registers for mov      |cprop_hardreg propgates
                   |instructions between        |hard registers for mov
                   |different REG_CLASS without |instructions between
                   |considering cost            |different REG_CLASS without
                   |                            |considering cost
          Component|target                      |rtl-optimization

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Confirmed, I see it even on aarch64:

        addv    s0, v0.4s
        fmov    w0, s0
        fmov    w1, s0


In GCC 11 we get:

        ldr     q0, [x1]
        shl     v0.4s, v0.4s, 1
        addv    s0, v0.4s
        fmov    w0, s0
        lsr     w1, w0, 16
        add     w0, w1, w0, uxth
        lsr     w0, w0, 1


While on the trunk we get:

        shl     v0.4s, v0.4s, 1
        addv    s0, v0.4s
        fmov    w0, s0
        fmov    w1, s0
        and     w0, w0, 65535
        add     w0, w0, w1, lsr 16
        lsr     w0, w0, 1=