[Bug rtl-optimization/104198] [12 regression] ifcvf change breaks 64-bit SPARC bootstrap

["rdapp at linux dot ibm.com" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104198

--- Comment #10 from rdapp at linux dot ibm.com ---
Created attachment 52297
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=52297&action=edit
Tentative patch

I now have something that successfully bootstraps on s390x, PowerPC and SPARC
but I'm not really happy with it.

The idea is basically to check if the newly introduced sequence (getting passed
a cc comparison) emits an instruction other than the movcc that reads a
register used in the comparison.  I'm not sure what backends are supposed to
emit for such a sequence but most likely everything is admissible. 
reg_overlap_mentioned_p does not handle every rtx_code so special handling is
necessary which needs to be exhaustive in order for reg_overlap_mentioned_p not
to ICE.

I feel like this is not the best way to achieve what we want and would
appreciate some insight.  I attached the current full diff to master (including
the fix for the problem triggered by the or1k backend.  It's pretty
raw/unpolished/ugly but the idea should come across.

A full testsuite run on gcc202 just finished, 83 FAILs, but I haven't yet done
a comparison run from before the ifcvt changes.