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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug tree-optimization/104600] VCE<integer_type>(vector){} should be converted (or expanded) into BIT_INSERT_EXPR Date: Mon, 21 Feb 2022 08:45:35 +0000 [thread overview] Message-ID: <bug-104600-4-lJ8GCjWmeB@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-104600-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104600 --- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> --- Here is another example even with 32bit int and 64bit long: #define vector __attribute__((vector_size(8))) long f(int a, int b) { vector int t = {a, b}; return (long)t; } void f1(long *t1, int a, int b) { vector int t = {a, b}; *t1 = (long)t; } void f2(long *t1, int a, int b) { vector int t = {a, b}; *t1 = ((long)t) + 1; } long f_1(unsigned a, unsigned b) { long t = (((unsigned long)a) << 32) | (unsigned long)b; return (long)t; } void f1_1(long *t1, unsigned a, unsigned b) { long t = (((unsigned long)a) << 32) | (unsigned long)b; *t1 = (long)t; } void f2_1(long *t1, unsigned a, unsigned b) { long t = (((unsigned long)a) << 32) | (unsigned long)b; *t1 = ((long)t) + 1; } ----- CUT ---- For f2 and f2_1 we have: movd %esi, %xmm0 movd %edx, %xmm1 punpckldq %xmm1, %xmm0 movq %xmm0, %rsi addq $1, %rsi movq %rsi, (%rdi) vs salq $32, %rsi movl %edx, %edx orq %rdx, %rsi addq $1, %rsi movq %rsi, (%rdi) It all depends on how fast move between GPRs and SSE register sets is vs doing it all in the integer. I only think this should be done for the 2x size case and nothing more.
prev parent reply other threads:[~2022-02-21 8:45 UTC|newest] Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-02-18 21:15 [Bug tree-optimization/104600] New: " pinskia at gcc dot gnu.org 2022-02-21 8:00 ` [Bug tree-optimization/104600] " rguenth at gcc dot gnu.org 2022-02-21 8:45 ` pinskia at gcc dot gnu.org [this message]
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