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From: "amonakov at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/104688] gcc and libatomic can use SSE for 128-bit atomic
 loads on Intel and AMD CPUs with AVX
Date: Mon, 28 Nov 2022 18:46:35 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D104688

--- Comment #24 from Alexander Monakov <amonakov at gcc dot gnu.org> ---
(In reply to Peter Cordes from comment #23)
> But at least on Linux, I don't think there's a way for user-space to even
> ask for a page of WT or WP memory (or UC or WC).  Only WB memory is easily
> available without hacking the kernel.  As far as I know, this is true on
> other existing OSes.

I think it's possible to get UC/WC mappings via a graphics/compute API (e.g.
OpenGL, Vulkan, OpenCL, CUDA) on any OS if you get a mapping to device memo=
ry
(and then CPU vendor cannot guarantee that 128b access won't tear because it
might depend on downstream devices).=