From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 928F8382EF3E; Tue, 15 Nov 2022 07:20:15 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 928F8382EF3E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1668496815; bh=Hs/sHmc9ZSap4AUuD+HT4KwHWKx22vfAzmo4utBWuQo=; h=From:To:Subject:Date:In-Reply-To:References:From; b=M5nlE0374JaNOmizqrp39hYic4rIQB2Rp+9LPFibv5IhfU4BqYgL3FzBwPCDyAOuj ueRQBOFm3gQDhYb+E9m4lZXx+MZuU/60okH32ZSejoERQGc/v9ggSQBSXKgvNzqjNA Frk8PjtHYiyNis4lCWAI1e4G+1ZGhxYo7hkNrHL0= From: "jakub at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/104688] gcc and libatomic can use SSE for 128-bit atomic loads on Intel and AMD CPUs with AVX Date: Tue, 15 Nov 2022 07:20:14 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: missed-optimization, patch X-Bugzilla-Severity: normal X-Bugzilla-Who: jakub at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D104688 --- Comment #17 from Jakub Jelinek --- Fixed for AMD on the library side too. We need a statement from Zhaoxin and VIA for their CPUs.=