From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 001473854564; Wed, 23 Nov 2022 09:18:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 001473854564 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1669195116; bh=la+dOJ35THO6CvWpKpwgUvLDHRcGqTxq4NmIpVEJhog=; h=From:To:Subject:Date:In-Reply-To:References:From; b=TQIiIRGn0hDw1zevicnjO4qqlko5otRURjVgPOTniFx/6Hbg+jwWbNv4U+fnY4C37 XBGSjrsyn94hQ3lSS8n//+zC9PueJidjcNrlfKRiCq7fdG6UREeP9RcAOv7f62ObQS BRwBlWptFKiN0ZCWd2wJkZzWkd5/zlvaWB3nqJHU= From: "xry111 at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/104688] gcc and libatomic can use SSE for 128-bit atomic loads on Intel and AMD CPUs with AVX Date: Wed, 23 Nov 2022 09:18:31 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: missed-optimization, patch X-Bugzilla-Severity: normal X-Bugzilla-Who: xry111 at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D104688 --- Comment #20 from Xi Ruoyao --- >From Mayshao (Zhaoxin engineer): "On Zhaoxin CPUs with AVX, the VMOVDQA instruction is atomic if the accessed memory is Write Back, but it's not guaranteed for other memory types." Is it allowed to use VMOVDQA then?=