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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/104688] gcc and libatomic can use SSE for 128-bit atomic loads on Intel and AMD CPUs with AVX
Date: Mon, 21 Nov 2022 09:23:03 +0000 [thread overview]
Message-ID: <bug-104688-4-yBnxoz7jnN@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-104688-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688
--- Comment #19 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by Jakub Jelinek
<jakub@gcc.gnu.org>:
https://gcc.gnu.org/g:60880f3afc82f55b834643e449883dd5b6ad057a
commit r11-10385-g60880f3afc82f55b834643e449883dd5b6ad057a
Author: Jakub Jelinek <jakub@redhat.com>
Date: Tue Nov 15 08:14:45 2022 +0100
libatomic: Handle AVX+CX16 AMD like Intel for 16b atomics [PR104688]
We got a response from AMD in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688#c10
so the following patch starts treating AMD with AVX and CMPXCHG16B
ISAs like Intel by using vmovdqa for atomic load/store in libatomic.
We still don't have confirmation from Zhaoxin and VIA (anything else
with CPUs featuring AVX and CX16?).
2022-11-15 Jakub Jelinek <jakub@redhat.com>
PR target/104688
* config/x86/init.c (__libat_feat1_init): Don't clear
bit_AVX on AMD CPUs.
(cherry picked from commit 4a7a846687e076eae58ad3ea959245b2bf7fdc07)
next prev parent reply other threads:[~2022-11-21 9:23 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-25 14:22 [Bug target/104688] New: gcc and libatomic can use SSE for 128-bit atomic loads on Intel " xry111 at mengyan1223 dot wang
2022-02-25 14:30 ` [Bug target/104688] " jakub at gcc dot gnu.org
2022-02-25 14:33 ` xry111 at mengyan1223 dot wang
2022-02-25 14:34 ` fw at gcc dot gnu.org
2022-02-25 16:36 ` jakub at gcc dot gnu.org
2022-02-25 16:37 ` jakub at gcc dot gnu.org
2022-03-17 17:50 ` cvs-commit at gcc dot gnu.org
2022-03-29 5:54 ` cvs-commit at gcc dot gnu.org
2022-04-05 12:30 ` xry111 at mengyan1223 dot wang
2022-04-05 12:35 ` jakub at gcc dot gnu.org
2022-11-14 3:31 ` Ganesh.Gopalasubramanian at amd dot com
2022-11-14 4:58 ` sam at gentoo dot org
2022-11-14 5:10 ` [Bug target/104688] gcc and libatomic can use SSE for 128-bit atomic loads on Intel and AMD " xry111 at gcc dot gnu.org
2022-11-14 7:54 ` jakub at gcc dot gnu.org
2022-11-14 9:24 ` amonakov at gcc dot gnu.org
2022-11-14 9:29 ` jakub at gcc dot gnu.org
2022-11-14 9:52 ` amonakov at gcc dot gnu.org
2022-11-15 7:18 ` cvs-commit at gcc dot gnu.org
2022-11-15 7:20 ` jakub at gcc dot gnu.org
2022-11-20 23:11 ` cvs-commit at gcc dot gnu.org
2022-11-21 9:23 ` cvs-commit at gcc dot gnu.org [this message]
2022-11-23 9:18 ` xry111 at gcc dot gnu.org
2022-11-23 9:51 ` jakub at gcc dot gnu.org
2022-11-23 10:23 ` xry111 at gcc dot gnu.org
2022-11-28 18:35 ` peter at cordes dot ca
2022-11-28 18:46 ` amonakov at gcc dot gnu.org
2022-11-28 19:03 ` peter at cordes dot ca
2022-11-28 20:11 ` amonakov at gcc dot gnu.org
2022-11-28 20:47 ` peter at cordes dot ca
2022-11-29 8:11 ` fw at gcc dot gnu.org
2023-02-15 12:27 ` segher at gcc dot gnu.org
2023-02-15 12:46 ` fw at gcc dot gnu.org
2023-02-15 16:03 ` segher at gcc dot gnu.org
2023-02-15 16:07 ` pinskia at gcc dot gnu.org
2023-02-15 16:09 ` segher at gcc dot gnu.org
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