From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id B923F3832355; Mon, 14 Nov 2022 04:58:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B923F3832355 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1668401910; bh=uoFfIHO8Mo/E0t25Jm0o6xTtWC8MvdIJyh0GZxqshv4=; h=From:To:Subject:Date:In-Reply-To:References:From; b=asQ5/Gk9xmKE2CoRpUkoV85uBr0JyO8ECO/laEQWAcvrlNqDtCFVb+Lxz4Elu9raY MfBQ9PWSsxyL4fdLdE6aZ8rRprr+sG1AEitiqE9EcGwg4zubHodGDmU2fe68iIqeip qDTsCEaiTdzTvFMJAhLyBlyD3HVs15jEyqLSbUSU= From: "sam at gentoo dot org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/104688] gcc and libatomic can use SSE for 128-bit atomic loads on Intel CPUs with AVX Date: Mon, 14 Nov 2022 04:58:29 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: missed-optimization, patch X-Bugzilla-Severity: normal X-Bugzilla-Who: sam at gentoo dot org X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D104688 --- Comment #11 from Sam James --- (In reply to GGanesh from comment #10) > Can we extend this patch to AMD processors as well. If not, I will plan to > submit the patch for stage-1! GCC 13 (as of today) is in stage 3 - see https://gcc.gnu.org/develop.html, = but it may or may not still be possible to submit it (not my call).=