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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/104704] [12 Regression] ix86_gen_scratch_sse_rtx doesn't
 work with explicit XMM7/XMM15/XMM31 usage
Date: Thu, 03 Mar 2022 01:14:50 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D104704

--- Comment #11 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to H.J. Lu from comment #9)
> --- pieces-memset-46.s	2022-03-02 06:44:55.845212762 -0800
> +++
> /export/build/gnu/tools-build/gcc-gitlab-debug/build-x86_64-linux/gcc/pie=
ces-
> memset-46.s	2022-03-02 06:45:03.313188978 -0800
> @@ -8,9 +8,11 @@ foo:
>  	.cfi_startproc
>  	movq	dst(%rip), %rdx
>  	movl	$3, %eax
> -	vpbroadcastb	%eax, %zmm31
> -	vmovdqu8	%zmm31, (%rdx)
> -	vmovw	%xmm31, 64(%rdx)
> +	vpbroadcastb	%eax, %zmm0
> +	movl	$771, %eax
> +	movw	%ax, 64(%rdx)
> +	vmovdqu8	%zmm0, (%rdx)
> +	vzeroupper
>  	ret
>  	.cfi_endproc
>  .LFE0:
>=20
> gen_reg_rtx generates 2 extra instructions for pieces-memset-46.c.

It's on purpose.

;; Don't move an immediate directly to memory when the instruction
;; gets too big, or if LCP stalls are a problem for 16-bit moves.

(define_peephole2
  [(match_scratch:SWI124 2 "<r>")
   (set (match_operand:SWI124 0 "memory_operand")
        (match_operand:SWI124 1 "immediate_operand"))]
  "optimize_insn_for_speed_p ()
   && ((<MODE>mode =3D=3D HImode
       && TARGET_LCP_STALL)
       || (TARGET_SPLIT_LONG_MOVES
          && get_attr_length (insn) >=3D ix86_cur_cost ()->large_insn))"
  [(set (match_dup 2) (match_dup 1))
   (set (match_dup 0) (match_dup 2))])=