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From: "bergner at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/104894] [11/12 Regression] ICE with -fno-plt
 -mcpu=power10 on PowerPC64 LE Linux
Date: Tue, 22 Mar 2022 21:44:05 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D104894

Peter Bergner <bergner at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |bergner at gcc dot gnu.org,
                   |                            |meissner at gcc dot gnu.org

--- Comment #3 from Peter Bergner <bergner at gcc dot gnu.org> ---
(In reply to Alan Modra from comment #1)
> Likely "gcc_assert (INTVAL (cookie) =3D=3D 0);" in
> rs6000_sibcall_aix can just be deleted.

I think it's still useful to ensure we have a valid sibcall.  The problem is
that with pcrel, we have more opportunities to do a sibcall than we did bef=
ore,
meaning it doesn't matter if the callee has the same TOC value as us, since=
 we
don't use it.  I think we just need to relax the assert when the caller is
pcrel.  The following fixes the ICE and I'm putting it through a bootstrap &
regtest cycle.

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index a7645820b1e..fc5cfeac4fa 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -25659,7 +25659,7 @@ rs6000_sibcall_aix (rtx value, rtx func_desc, rtx
tlsarg, rtx cookie)
   rtx r12 =3D NULL_RTX;
   rtx func_addr =3D func_desc;

-  gcc_assert (INTVAL (cookie) =3D=3D 0);
+  gcc_assert (rs6000_pcrel_p () || INTVAL (cookie) =3D=3D 0);

   if (global_tlsarg)
     tlsarg =3D global_tlsarg;=