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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/104914] [MIPS] wrong comparison with scrabbled int value
Date: Thu, 06 Jul 2023 19:05:23 +0000	[thread overview]
Message-ID: <bug-104914-4-ZtwkzlLZde@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-104914-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104914

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|target                      |rtl-optimization
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2023-07-06
             Status|UNCONFIRMED                 |NEW
      Known to fail|                            |11.2.0

--- Comment #7 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
The initial RTL has a signed extend in there:


(insn 20 19 23 2 (set (reg/v:DI 200 [ val+-4 ])
        (sign_extend:DI (subreg:SI (reg/v:DI 200 [ val+-4 ]) 4)))
"/app/example.cpp":7:29 -1
     (nil))
(jump_insn 23 20 24 2 (set (pc)
        (if_then_else (le (subreg/s/u:SI (reg/v:DI 200 [ val+-4 ]) 4)
                (const_int 0 [0]))
            (label_ref 32)
            (pc))) "/app/example.cpp":8:5 -1
     (int_list:REG_BR_PROB 440234148 (nil))
 -> 32)


Before combine also looks fine:
(insn 20 19 23 2 (set (reg/v:DI 200 [ val+-4 ])
        (sign_extend:DI (subreg:SI (reg/v:DI 200 [ val+-4 ]) 4)))
"/app/example.cpp":7:29 235 {extendsidi2}
     (nil))
(jump_insn 23 20 24 2 (set (pc)
        (if_then_else (le (subreg/s/u:SI (reg/v:DI 200 [ val+-4 ]) 4)
                (const_int 0 [0]))
            (label_ref 32)
            (pc))) "/app/example.cpp":8:5 471 {*branch_ordersi}
     (expr_list:REG_DEAD (reg/v:DI 200 [ val+-4 ])
        (int_list:REG_BR_PROB 440234148 (nil)))
 -> 32)

But combine does the wrong thing:
Trying 20 -> 23:
   20: r200:DI=sign_extend(r200:DI#4)
   23: pc={(r200:DI#4<=0)?L32:pc}
      REG_DEAD r200:DI
      REG_BR_PROB 440234148
Successfully matched this instruction:
(set (pc)
    (if_then_else (le (subreg:SI (reg/v:DI 200 [ valD.1959+-4 ]) 4)
            (const_int 0 [0]))
        (label_ref 32)
        (pc)))
allowing combination of insns 20 and 23
original costs 4 + 16 = 20
replacement cost 16
deferring deletion of insn with uid = 20.
modifying insn i3    23: pc={(r200:DI#4<=0)?L32:pc}
      REG_BR_PROB 440234148
      REG_DEAD r200:DI
deferring rescan insn with uid = 23.

Instead of a subreg here, it should have been a truncate.

  parent reply	other threads:[~2023-07-06 19:05 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-14 11:49 [Bug target/104914] New: " mmyangfl at gmail dot com
2022-03-14 12:13 ` [Bug target/104914] " mmyangfl at gmail dot com
2023-07-04  6:42 ` syq at gcc dot gnu.org
2023-07-04  8:33 ` syq at gcc dot gnu.org
2023-07-04  9:05 ` pinskia at gcc dot gnu.org
2023-07-04 10:14 ` syq at gcc dot gnu.org
2023-07-05  9:50 ` syq at gcc dot gnu.org
2023-07-06 19:05 ` pinskia at gcc dot gnu.org [this message]
2023-07-07  4:21 ` [Bug rtl-optimization/104914] " syq at gcc dot gnu.org
2023-07-07  4:31 ` pinskia at gcc dot gnu.org
2023-07-07  4:52 ` pinskia at gcc dot gnu.org
2023-07-07  5:05 ` pinskia at gcc dot gnu.org
2023-07-07  5:12 ` pinskia at gcc dot gnu.org
2023-07-12  2:23 ` syq at gcc dot gnu.org
2023-07-14 10:15 ` syq at gcc dot gnu.org
2023-08-03  9:09 ` roger at nextmovesoftware dot com
2023-08-03  9:34 ` syq at gcc dot gnu.org
2023-12-24 13:53 ` roger at nextmovesoftware dot com
2023-12-24 14:06 ` roger at nextmovesoftware dot com
2023-12-24 16:15 ` roger at nextmovesoftware dot com
2023-12-24 23:04 ` syq at gcc dot gnu.org
2023-12-25  1:44 ` syq at gcc dot gnu.org
2023-12-25  1:47 ` syq at gcc dot gnu.org
2023-12-27 14:02 ` syq at gcc dot gnu.org
2024-01-04  1:56 ` cvs-commit at gcc dot gnu.org
2024-01-04 10:50 ` cvs-commit at gcc dot gnu.org
2024-01-04 11:10 ` syq at gcc dot gnu.org

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