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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/105072] New: Miss optimization for pmovzxbq.
Date: Mon, 28 Mar 2022 03:50:43 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D105072

            Bug ID: 105072
           Summary: Miss optimization for pmovzxbq.
           Product: gcc
           Version: 12.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: crazylht at gmail dot com
  Target Milestone: ---

This is quoted from PR105066:

It's also essential that these loads fold efficiently into memory source
operands for PMOVZX; pmovzxbq is one of the major use-cases for a 16-bit lo=
ad.

That may be a separate bug, IDK

https://godbolt.org/z/3a9T55n3q shows _mm_cvtepu8_epi32(_mm_loadu_si32(p)) =
does
fold a 32-bit memory source operand nicely to pmovzxbd (%rdi), %xmm0 which =
can
micro-fuse into a single uop on Intel CPUs (for the 128-bit destination
version, not YMM), but disaster with 16-bit loads:

__m128i pmovzxbq(void *p){
    return _mm_cvtepu8_epi64(_mm_loadu_si16(p));
}

pmovzxbq(void*):  # -O3 -msse4.1 -mtune=3Dhaswell
        pxor    %xmm0, %xmm0                  # 1 uop
        pinsrw  $0, (%rdi), %xmm0             # 2 uops, one for shuffle port
        pmovzxbq        %xmm0, %xmm0          # 1 uop for the same shuffle =
port
        ret

(_mm_cvtepu8_epi64 requires SSE4.1 so there's no interaction with the
-mno-sse4.1 implementation of the load.)=