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* [Bug target/105288] New: AVX/AVX512 casts should the "v" constraint
@ 2022-04-15 20:27 hjl.tools at gmail dot com
2022-04-16 2:51 ` [Bug target/105288] AVX/AVX512 casts should use " wwwhhhyyy333 at gmail dot com
2022-04-18 2:25 ` crazylht at gmail dot com
0 siblings, 2 replies; 3+ messages in thread
From: hjl.tools at gmail dot com @ 2022-04-15 20:27 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105288
Bug ID: 105288
Summary: AVX/AVX512 casts should the "v" constraint
Product: gcc
Version: 12.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: hjl.tools at gmail dot com
CC: crazylht at gmail dot com, wwwhhhyyy333 at gmail dot com
Target Milestone: ---
Target: x86-64
There are
(define_insn_and_split "avx_<castmode><avxsizesuffix>_<castmode>"
[(set (match_operand:AVX256MODE2P 0 "nonimmediate_operand" "=x,m")
(vec_concat:AVX256MODE2P
(match_operand:<ssehalfvecmode> 1 "nonimmediate_operand" "xm,x")
(unspec:<ssehalfvecmode> [(const_int 0)] UNSPEC_CAST)))]
"TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
where the "x" constraint should be "v".
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug target/105288] AVX/AVX512 casts should use the "v" constraint
2022-04-15 20:27 [Bug target/105288] New: AVX/AVX512 casts should the "v" constraint hjl.tools at gmail dot com
@ 2022-04-16 2:51 ` wwwhhhyyy333 at gmail dot com
2022-04-18 2:25 ` crazylht at gmail dot com
1 sibling, 0 replies; 3+ messages in thread
From: wwwhhhyyy333 at gmail dot com @ 2022-04-16 2:51 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105288
--- Comment #1 from Hongyu Wang <wwwhhhyyy333 at gmail dot com> ---
I think should be these 2?
(define_insn_and_split "avx512f_<castmode><avxsizesuffix>_<castmode>"
[(set (match_operand:AVX512MODE2P 0 "nonimmediate_operand" "=x,m")
(vec_concat:AVX512MODE2P
(vec_concat:<ssehalfvecmode>
(match_operand:<ssequartermode> 1 "nonimmediate_operand" "xm,x")
(unspec:<ssequartermode> [(const_int 0)] UNSPEC_CAST))
(unspec:<ssehalfvecmode> [(const_int 0)] UNSPEC_CAST)))]
"TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
(define_insn_and_split "avx512f_<castmode><avxsizesuffix>_256<castmode>"
[(set (match_operand:AVX512MODE2P 0 "nonimmediate_operand" "=x,m")
(vec_concat:AVX512MODE2P
(match_operand:<ssehalfvecmode> 1 "nonimmediate_operand" "xm,x")
(unspec:<ssehalfvecmode> [(const_int 0)] UNSPEC_CAST)))]
"TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
The AVX insn shouldn't have constraints "v"
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug target/105288] AVX/AVX512 casts should use the "v" constraint
2022-04-15 20:27 [Bug target/105288] New: AVX/AVX512 casts should the "v" constraint hjl.tools at gmail dot com
2022-04-16 2:51 ` [Bug target/105288] AVX/AVX512 casts should use " wwwhhhyyy333 at gmail dot com
@ 2022-04-18 2:25 ` crazylht at gmail dot com
1 sibling, 0 replies; 3+ messages in thread
From: crazylht at gmail dot com @ 2022-04-18 2:25 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105288
--- Comment #2 from Hongtao.liu <crazylht at gmail dot com> ---
I think HJ means avx_<castmode><avxsizesuffix>_<castmode> can be extended to
evex sse registes by change "x" to "v" when AVX512VL is available.
For avx512f_<castmode><avxsizesuffix>_<castmode>, it should be
"=Yv,m"
" vm,v"
since operands[0] could be allocated as evex register w/o AVX512VL, but it will
be lower to 256-bit mov which require AVX512VL for evex registers.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-04-18 2:25 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2022-04-15 20:27 [Bug target/105288] New: AVX/AVX512 casts should the "v" constraint hjl.tools at gmail dot com
2022-04-16 2:51 ` [Bug target/105288] AVX/AVX512 casts should use " wwwhhhyyy333 at gmail dot com
2022-04-18 2:25 ` crazylht at gmail dot com
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