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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/105314] [12 Regression] ifcvt regression in noce_try_store_flag_mask
Date: Tue, 26 Apr 2022 08:12:44 +0000	[thread overview]
Message-ID: <bug-105314-4-AzllLLM4Bt@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-105314-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105314

--- Comment #9 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>:

https://gcc.gnu.org/g:7d31c678d68d7b6820a958584619ca763b0eb9c5

commit r12-8264-g7d31c678d68d7b6820a958584619ca763b0eb9c5
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Tue Apr 26 10:11:58 2022 +0200

    ifcvt: Improve noce_try_store_flag_mask [PR105314]

    The following testcase regressed on riscv due to the splitting of critical
    edges in the sink pass, similarly to x86_64 compared to GCC 11 we now swap
    the edges, whether true or false edge goes to an empty forwarded bb.
    From GIMPLE POV, those 2 forms are equivalent, but as can be seen here, for
    some ifcvt opts it matters one way or another.

    On this testcase, noce_try_store_flag_mask used to trigger and transformed
    if (pseudo2) pseudo1 = 0;
    into
    pseudo1 &= -(pseudo2 == 0);
    But with the swapped edges ifcvt actually sees
    if (!pseudo2) pseudo3 = pseudo1; else pseudo3 = 0;
    and noce_try_store_flag_mask punts.  IMHO there is no reason why it
    should punt those, it is equivalent to
    pseudo3 = pseudo1 & -(pseudo2 == 0);
    and especially if the target has 3 operand AND, it shouldn't be any more
    costly (and even with 2 operand AND, it might very well happen that RA
    can make it happen without any extra moves).

    Initially I've just removed the rtx_equal_p calls from the conditions
    and didn't add anything there, but that broke aarch64 bootstrap and
    regressed some testcases on x86_64, where if_info->a or if_info->b could be
    some larger expression that we can't force into a register.
    Furthermore, the case where both if_info->a and if_info->b are constants is
    better handled by other ifcvt optimizations like noce_try_store_flag
    or noce_try_inverse_constants or noce_try_store_flag_constants.
    So, I've restricted it to just a REG (perhaps SUBREG of REG might be ok
too)
    next to what has been handled previously.

    2022-04-26  Jakub Jelinek  <jakub@redhat.com>

            PR rtl-optimization/105314
            * ifcvt.cc (noce_try_store_flag_mask): Don't require that the
non-zero
            operand is equal to if_info->x, instead use the non-zero operand
            as one of the operands of AND with if_info->x as target.

            * gcc.target/riscv/pr105314.c: New test.

  parent reply	other threads:[~2022-04-26  8:12 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-19 20:19 [Bug tree-optimization/105314] New: " christophm30 at gmail dot com
2022-04-19 20:23 ` [Bug tree-optimization/105314] " christophm30 at gmail dot com
2022-04-20  7:10 ` marxin at gcc dot gnu.org
2022-04-20  7:10 ` marxin at gcc dot gnu.org
2022-04-20  7:49 ` [Bug target/105314] " rguenth at gcc dot gnu.org
2022-04-22  9:48 ` [Bug target/105314] [12 Regression] " pinskia at gcc dot gnu.org
2022-04-25 15:45 ` [Bug rtl-optimization/105314] " jakub at gcc dot gnu.org
2022-04-25 22:34 ` ptomsich at gcc dot gnu.org
2022-04-25 22:40 ` christophm30 at gmail dot com
2022-04-25 22:47 ` ptomsich at gcc dot gnu.org
2022-04-26  0:05 ` christophm30 at gmail dot com
2022-04-26  8:12 ` cvs-commit at gcc dot gnu.org [this message]
2022-04-26  8:13 ` jakub at gcc dot gnu.org
2024-01-26 21:48 ` cvs-commit at gcc dot gnu.org

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