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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/105354] __builtin_shuffle for alignr generates suboptimal code unless SSSE3 is enabled
Date: Sun, 24 Apr 2022 03:57:47 +0000 [thread overview]
Message-ID: <bug-105354-4-i7AjwfKeZb@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-105354-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105354
--- Comment #2 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Hongtao.liu from comment #1)
> Yes, and I think it's only available for simd128u8, not for
> simd128u16/u32/u64.
No, under sse2 the optimization is also availble for simd128u16, directly
generates pshufd/shufpd for simd128u32/u64.
next prev parent reply other threads:[~2022-04-24 3:57 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-22 21:46 [Bug target/105354] New: " john_platts at hotmail dot com
2022-04-22 21:52 ` [Bug target/105354] " pinskia at gcc dot gnu.org
2022-04-24 3:38 ` crazylht at gmail dot com
2022-04-24 3:57 ` crazylht at gmail dot com [this message]
2022-04-28 1:34 ` crazylht at gmail dot com
2022-05-09 13:23 ` cvs-commit at gcc dot gnu.org
2022-05-09 13:27 ` crazylht at gmail dot com
2023-05-11 13:21 ` chfast at gmail dot com
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