From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 4ED38385734D; Tue, 26 Apr 2022 13:22:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4ED38385734D From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/105394] [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2 Date: Tue, 26 Apr 2022 13:22:36 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.0 X-Bugzilla-Keywords: ice-on-valid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: component assigned_to bug_status cc Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 26 Apr 2022 13:22:36 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D105394 Richard Biener changed: What |Removed |Added ---------------------------------------------------------------------------- Component|tree-optimization |target Assignee|rguenth at gcc dot gnu.org |unassigned at gcc d= ot gnu.org Status|ASSIGNED |NEW CC| |rguenth at gcc dot gnu.org, | |rsandifo at gcc dot gnu.org --- Comment #4 from Richard Biener --- I see for arm B4Imode as inner mode of V4BI but on aarch64 the VNxMBI modes= all have BImode as inner mode. They'd of course still run into this issue if we ever have to lower SVE ops. But maybe that we run into this for MVE is also just because of missing patterns in the machine description. diff --git a/gcc/tree-vect-generic.cc b/gcc/tree-vect-generic.cc index 8b7227e8b58..1258cc48b16 100644 --- a/gcc/tree-vect-generic.cc +++ b/gcc/tree-vect-generic.cc @@ -1034,6 +1034,7 @@ expand_vector_condition (gimple_stmt_iterator *gsi, bitmap dce_ssa_names) tree a2 =3D NULL_TREE; bool a_is_comparison =3D false; bool a_is_scalar_bitmask =3D false; + unsigned bitmask_elwidth =3D 0; tree b =3D gimple_assign_rhs2 (stmt); tree c =3D gimple_assign_rhs3 (stmt); vec *v; @@ -1111,14 +1112,12 @@ expand_vector_condition (gimple_stmt_iterator *gsi, bitmap dce_ssa_names) if (!a_is_comparison && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (a)) - && SCALAR_INT_MODE_P (TYPE_MODE (TREE_TYPE (a))) - && known_lt (GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (a))), - TYPE_VECTOR_SUBPARTS (TREE_TYPE (a)) - * GET_MODE_BITSIZE (SCALAR_TYPE_MODE - (TREE_TYPE (TREE_TYPE (a)))= ))) + && (SCALAR_INT_MODE_P (TYPE_MODE (TREE_TYPE (a))) + || GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (a))) =3D=3D MODE_VECTOR_= BOOL)) { a_is_scalar_bitmask =3D true; - int prec =3D GET_MODE_PRECISION (SCALAR_TYPE_MODE (TREE_TYPE (a))); + bitmask_elwidth =3D TYPE_PRECISION (TREE_TYPE (TREE_TYPE (a))); + int prec =3D GET_MODE_PRECISION (TYPE_MODE (TREE_TYPE (a))).to_const= ant (); tree atype =3D build_nonstandard_integer_type (prec, 1); a =3D gimplify_build1 (gsi, VIEW_CONVERT_EXPR, atype, a); } @@ -1141,7 +1140,8 @@ expand_vector_condition (gimple_stmt_iterator *gsi, bitmap dce_ssa_names) } else if (a_is_scalar_bitmask) { - wide_int w =3D wi::set_bit_in_zero (i, TYPE_PRECISION (TREE_TYPE = (a))); + wide_int w =3D wi::shifted_mask (i * bitmask_elwidth, bitmask_elw= idth, + false, TYPE_PRECISION (TREE_TYPE (a))); result =3D gimplify_build2 (gsi, BIT_AND_EXPR, TREE_TYPE (a), a, wide_int_to_tree (TREE_TYPE (a), w)); aa =3D build2 (NE_EXPR, boolean_type_node, result,=