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From: "already5chosen at yahoo dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/105617] New: Regression in code generation for _addcarry_u64()
Date: Mon, 16 May 2022 12:08:56 +0000	[thread overview]
Message-ID: <bug-105617-4@http.gcc.gnu.org/bugzilla/> (raw)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105617

            Bug ID: 105617
           Summary: Regression in code generation for _addcarry_u64()
           Product: gcc
           Version: 12.1.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: already5chosen at yahoo dot com
  Target Milestone: ---

It took many years until gcc caught up with MSVC and LLVM/clang in generation
of code for chains of  Intel's _addcarry_u64() intrinsic calls. But your
finally managed to do it in gcc11.
Unfortunately, the luck didn't last for long.


void add4i(uint64_t dst[4], const uint64_t srcA[4], const uint64_t srcB[4])
{
  unsigned char c;
  unsigned long long r0; c = _addcarry_u64(0, srcA[0], srcB[0], &r0);
  unsigned long long r1; c = _addcarry_u64(c, srcA[1], srcB[1], &r1);
  unsigned long long r2; c = _addcarry_u64(c, srcA[2], srcB[2], &r2);
  unsigned long long r3; c = _addcarry_u64(c, srcA[3], srcB[3], &r3);
  dst[0] = r0;
  dst[1] = r1;
  dst[2] = r2;
  dst[3] = r3;
}

gcc 11.1 -O2

add4i:
        movq    (%rdx), %rax
        addq    (%rsi), %rax
        movq    8(%rsi), %rcx
        movq    %rax, %r8
        adcq    8(%rdx), %rcx
        movq    16(%rsi), %rax
        adcq    16(%rdx), %rax
        movq    24(%rdx), %rdx
        adcq    24(%rsi), %rdx
        movq    %r8, (%rdi)
        movq    %rcx, 8(%rdi)
        movq    %rax, 16(%rdi)
        movq    %rdx, 24(%rdi)
        ret


gcc 12.1  -O2

add4i:
        movq    (%rdx), %rax
        movq    8(%rsi), %rcx
        addq    (%rsi), %rax
        movq    16(%rsi), %r8
        adcq    8(%rdx), %rcx
        adcq    16(%rdx), %r8
        movq    %rax, %xmm1
        movq    24(%rdx), %rdx
        adcq    24(%rsi), %rdx
        movq    %r8, %xmm0
        movq    %rcx, %xmm3
        movq    %rdx, %xmm2
        punpcklqdq      %xmm3, %xmm1
        punpcklqdq      %xmm2, %xmm0
        movups  %xmm1, (%rdi)
        movups  %xmm0, 16(%rdi)
        ret

What ... ?!

BTW, gcc 12.1 -O1 is still o.k.

             reply	other threads:[~2022-05-16 12:08 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-16 12:08 already5chosen at yahoo dot com [this message]
2022-05-16 12:13 ` [Bug target/105617] [12/13 regressi] Slp is maybe too aggressive in some/many cases pinskia at gcc dot gnu.org
2022-05-16 12:14 ` pinskia at gcc dot gnu.org
2022-05-16 12:15 ` rguenth at gcc dot gnu.org
2022-05-16 12:38 ` [Bug target/105617] [12/13 Regression] " already5chosen at yahoo dot com
2022-05-16 13:02 ` already5chosen at yahoo dot com
2022-05-16 14:08 ` already5chosen at yahoo dot com
2022-05-17  2:47 ` crazylht at gmail dot com
2022-05-17  3:29 ` crazylht at gmail dot com
2022-05-17  3:37 ` crazylht at gmail dot com
2022-05-17  6:48 ` rguenth at gcc dot gnu.org
2022-05-17  9:17 ` already5chosen at yahoo dot com
2022-05-17  9:25 ` already5chosen at yahoo dot com
2022-05-19  8:05 ` crazylht at gmail dot com
2022-07-26 11:22 ` rguenth at gcc dot gnu.org
2022-07-26 11:22 ` rguenth at gcc dot gnu.org
2022-07-29 13:21 ` already5chosen at yahoo dot com
2023-05-08 12:24 ` [Bug target/105617] [12/13/14 " rguenth at gcc dot gnu.org
2023-06-01  7:58 ` slash.tmp at free dot fr
2023-06-07 23:16 ` already5chosen at yahoo dot com
2023-06-13 14:54 ` slash.tmp at free dot fr
2023-06-16 14:56 ` already5chosen at yahoo dot com

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