From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 51C1F385840D; Sat, 5 Nov 2022 08:53:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 51C1F385840D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667638411; bh=Tvhpj80D9aFOms92YxKvq/al8//K72Ai+6/34wy3vLc=; h=From:To:Subject:Date:In-Reply-To:References:From; b=mgOMBgZkTXt7k7aNlCfUTZh8EiClGNcGdMhRoblmNs+XhEQFLJxKr9KJ9GCP/so8L eu2+H4Ee66YCLLGcidoNwtEd/IPPINjie+BEhXcL+83OGSxeHLzRC0AvfqWZRdxwf3 9xlOFKtayXzz2aFxXZkJFjywLzd/Ntd8UnWyMnnY= From: "ramana at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/105929] [AArch64] armv8.4-a allows atomic stp. 64-bit constants can use 2 32-bit halves with _Atomic or volatile Date: Sat, 05 Nov 2022 08:53:30 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: ramana at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc everconfirmed bug_status cf_reconfirmed_on Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D105929 Ramana Radhakrishnan changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |ramana at gcc dot gnu.org Ever confirmed|0 |1 Status|UNCONFIRMED |NEW Last reconfirmed| |2022-11-05 --- Comment #1 from Ramana Radhakrishnan --- Confirmed as an 8 byte aligned store is always going to be fully within a 16 byte block aligned to a 16 byte aligned address.=