[Bug target/105965] [10/11/12/13 Regression] x86: single-element vectors don't have scalar FMA insns used anymore

["rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105965

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Assignee|unassigned at gcc dot gnu.org      |rguenth at gcc dot gnu.org
   Target Milestone|---                         |10.4
           Priority|P3                          |P2
             Status|UNCONFIRMED                 |ASSIGNED
            Summary|x86: single-element vectors |[10/11/12/13 Regression]
                   |don't have scalar FMA insns |x86: single-element vectors
                   |used anymore                |don't have scalar FMA insns
                   |                            |used anymore
   Last reconfirmed|                            |2022-06-14
     Ever confirmed|0                           |1
           Keywords|                            |missed-optimization

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
The widen-mul pass now sees

  <bb 2> [local count: 1073741824]:
  _8 = VIEW_CONVERT_EXPR<float>(a_3(D));
  _9 = VIEW_CONVERT_EXPR<float>(b_4(D));
  _10 = _8 * _9;
  _1 = {_10};
  _11 = VIEW_CONVERT_EXPR<float>(_1);
  _12 = VIEW_CONVERT_EXPR<float>(c_5(D));
  _13 = _11 + _12;
  BIT_FIELD_REF <<retval>, 32, 0> = _13;
  return <retval>;

which confuses it.  The above is the result from vector lowering which
presumably
sees that V1SFmode isn't supported.  In GCC 8 the above is instead

  <bb 2> [local count: 1073741825]:
  _8 = BIT_FIELD_REF <a_3(D), 32, 0>;
  _9 = BIT_FIELD_REF <b_4(D), 32, 0>;
  _10 = _8 * _9;
  _11 = BIT_FIELD_REF <c_5(D), 32, 0>;
  _12 = _10 + _11;
  _2 = {_12};
  <retval> = _2;

that means we are at least missing a match.pd pattern to simplify

  _1 = {_10};
  _11 = VIEW_CONVERT_EXPR<float>(_1);