From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id E9BC5386F0EA; Sun, 3 Jul 2022 17:30:51 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E9BC5386F0EA From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/106022] [12/13 Regression] Enable vectorizer generates extra load Date: Sun, 03 Jul 2022 17:30:51 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 12.1.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.2 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 03 Jul 2022 17:30:52 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106022 --- Comment #18 from CVS Commits --- The master branch has been updated by H.J. Lu : https://gcc.gnu.org/g:f3a5e75cb66dc96efca7d494fe6060746c88acb1 commit r13-1415-gf3a5e75cb66dc96efca7d494fe6060746c88acb1 Author: H.J. Lu Date: Fri Jun 17 17:02:05 2022 -0700 x86: Support 2/4/8 byte constant vector stores 1. Add a predicate for constant vectors which can be converted to integ= er constants suitable for constant integer stores. For a 8-byte constant vector, the converted 64-bit integer must be valid for store with 64-bit immediate, which is a 64-bit integer sign-extended from a 32-bit intege= r. 2. Add a new pattern to allow 2-byte, 4-byte and 8-byte constant vector stores, like (set (mem:V2HI (reg:DI 84)) (const_vector:V2HI [(const_int 0 [0]) (const_int 1 [0x1])])) 3. After reload, convert constant vector stores to constant integer stores, like (set (mem:SI (reg:DI 5 di [84])) (const_int 65536 [0x10000])) For void foo (short * c) { c[0] =3D 0; c[1] =3D 1; } it generates movl $65536, (%rdi) instead of movl .LC0(%rip), %eax movl %eax, (%rdi) gcc/ PR target/106022 * config/i386/i386-protos.h (ix86_convert_const_vector_to_integ= er): New. * config/i386/i386.cc (ix86_convert_const_vector_to_integer): New. * config/i386/mmx.md (V_16_32_64): New. (*mov_imm): New patterns for stores with 16-bit, 32-bit and 64-bit constant vector. * config/i386/predicates.md (x86_64_const_vector_operand): New. gcc/testsuite/ PR target/106022 * gcc.target/i386/pr106022-1.c: New test. * gcc.target/i386/pr106022-2.c: Likewise. * gcc.target/i386/pr106022-3.c: Likewise. * gcc.target/i386/pr106022-4.c: Likewise.=