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From: "mpolacek at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/106069] [12/13 Regression] wrong code with -O
 -fno-tree-forwprop -maltivec on ppc64le
Date: Thu, 23 Jun 2022 23:18:36 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106069

--- Comment #1 from Marek Polacek <mpolacek at gcc dot gnu.org> ---
The difference between r12-4495 and r12-4496:

$ diff -up b/q.C.252r.expand a/q.C.252r.expand
--- b/q.C.252r.expand   2022-06-23 23:16:44.753507476 +0000
+++ a/q.C.252r.expand   2022-06-23 23:16:16.232784087 +0000
@@ -831,10 +831,14 @@ try_optimize_cfg iteration 2
         (subreg:V16QI (reg/v:V4SI 168 [ R02$m_simd ]) 0)) "q.C":31:47 -1
      (nil))
 (insn 188 187 189 5 (set (reg:V4SI 339)
-        (unspec:V4SI [
-                (subreg:V4SI (reg:V16QI 338) 0)
-                (subreg:V4SI (reg:V16QI 337) 0)
-            ] UNSPEC_VMRGL_DIRECT)) "q.C":31:47 -1
+        (vec_select:V4SI (vec_concat:V8SI (subreg:V4SI (reg:V16QI 338) 0)
+                (subreg:V4SI (reg:V16QI 337) 0))
+            (parallel [
+                    (const_int 2 [0x2])
+                    (const_int 6 [0x6])
+                    (const_int 3 [0x3])
+                    (const_int 7 [0x7])
+                ]))) "q.C":31:47 -1
      (nil))
 (insn 189 188 190 5 (set (reg:V16QI 336)
         (subreg:V16QI (reg:V4SI 339) 0)) "q.C":31:47 -1
@@ -846,10 +850,14 @@ try_optimize_cfg iteration 2
         (subreg:V16QI (reg/v:V4SI 143 [ val ]) 0)) "q.C":32:47 -1
      (nil))
 (insn 192 191 193 5 (set (reg:V4SI 344)
-        (unspec:V4SI [
-                (subreg:V4SI (reg:V16QI 343) 0)
-                (subreg:V4SI (reg:V16QI 342) 0)
-            ] UNSPEC_VMRGL_DIRECT)) "q.C":32:47 -1
+        (vec_select:V4SI (vec_concat:V8SI (subreg:V4SI (reg:V16QI 343) 0)
+                (subreg:V4SI (reg:V16QI 342) 0))
+            (parallel [
+                    (const_int 2 [0x2])
+                    (const_int 6 [0x6])
+                    (const_int 3 [0x3])
+                    (const_int 7 [0x7])
+                ]))) "q.C":32:47 -1
      (nil))
 (insn 193 192 194 5 (set (reg:V16QI 341)
         (subreg:V16QI (reg:V4SI 344) 0)) "q.C":32:47 -1
@@ -861,10 +869,14 @@ try_optimize_cfg iteration 2
         (subreg:V4SI (reg:V16QI 341) 0)) "q.C":35:8 -1
      (nil))
 (insn 196 195 197 5 (set (reg:V4SI 349)
-        (unspec:V4SI [
-                (subreg:V4SI (reg:V16QI 341) 0)
-                (subreg:V4SI (reg:V16QI 336) 0)
-            ] UNSPEC_VMRGL_DIRECT)) "q.C":35:8 -1
+        (vec_select:V4SI (vec_concat:V8SI (subreg:V4SI (reg:V16QI 341) 0)
+                (subreg:V4SI (reg:V16QI 336) 0))
+            (parallel [
+                    (const_int 2 [0x2])
+                    (const_int 6 [0x6])
+                    (const_int 3 [0x3])
+                    (const_int 7 [0x7])
+                ]))) "q.C":35:8 -1
      (nil))
 (insn 197 196 198 5 (set (reg:V16QI 348)
         (subreg:V16QI (reg:V4SI 349) 0)) "q.C":35:8 -1
@@ -934,7 +946,7 @@ try_optimize_cfg iteration 2
         (reg/f:DI 120)) "q.C":103:7 -1
      (nil))
 (call_insn 9 8 10 2 (parallel [
-            (call (mem:SI (symbol_ref:DI ("_Z3fooPhPj") [flags 0x3]=20
<function_decl 0x3fff7f473a00 foo>) [0 foo S4 A8])
+            (call (mem:SI (symbol_ref:DI ("_Z3fooPhPj") [flags 0x3]=20
<function_decl 0x3fffa9823a00 foo>) [0 foo S4 A8])
                 (const_int 0 [0]))
             (use (const_int 0 [0]))
             (clobber (reg:DI 96 lr))
@@ -968,7 +980,7 @@ try_optimize_cfg iteration 2
  -> 17)
 (note 14 13 15 4 [bb 4] NOTE_INSN_BASIC_BLOCK)
 (call_insn 15 14 16 4 (parallel [
-            (call (mem:SI (symbol_ref:DI ("abort") [flags 0x41]=20
<function_decl 0x3fff7f2b5300 __builtin_abort>) [0 __builtin_abort S4 A8])
+            (call (mem:SI (symbol_ref:DI ("abort") [flags 0x41]=20
<function_decl 0x3fffa9665300 __builtin_abort>) [0 __builtin_abort S4 A8])
                 (const_int 0 [0]))
             (use (const_int 0 [0]))
             (clobber (reg:DI 96 lr))=