From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 2A5E83856250; Mon, 27 Jun 2022 09:26:55 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 2A5E83856250 From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/106101] [12/13 Regression] ICE in reg_bitfield_target_p Date: Mon, 27 Jun 2022 09:26:55 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 12.1.1 X-Bugzilla-Keywords: ice-on-valid-code, needs-bisection X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.2 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc bug_status cf_reconfirmed_on keywords everconfirmed Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Jun 2022 09:26:55 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106101 Richard Biener changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |segher at gcc dot gnu.org Status|UNCONFIRMED |NEW Last reconfirmed| |2022-06-27 Keywords| |needs-bisection Ever confirmed|0 |1 --- Comment #2 from Richard Biener --- Program received signal SIGSEGV, Segmentation fault. 0x00000000021932ef in reg_bitfield_target_p (x=3D0x7ffff6a4ee10, body=3D0x7ffff6a4e450) at /space/rguenther/src/gcc/gcc/combine.cc:14142 14142 if (GET_CODE (target) =3D=3D SUBREG) (gdb) p target $1 =3D (rtx) 0xafafaf0100000047 one frame up: (gdb) p debug_rtx (place) (insn 24 52 25 4 (set (strict_low_part (reg/v:SI 71 [ yyval ])) (mem/f:SI (plus:DI (reg:DI 85) (const_int 4 [0x4])) [2 *_3+4 S4 A32])) "/tmp/y.tab.i":41:23 1485 {movstrictsi} (nil)) static int reg_bitfield_target_p (rtx x, rtx body) { ... else if (GET_CODE (dest) =3D=3D STRICT_LOW_PART) target =3D SUBREG_REG (XEXP (dest, 0)); but the strict_low_part doesn't contain a SUBREG ...!? Adding a check to that avail would of course fix this. It's all ancient code though...=