From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id D24E93858D39; Fri, 1 Jul 2022 08:20:11 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D24E93858D39 From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/106122] [12/13 Regression] ICE in fixup_args_size_notes, at expr.cc:4493 since r12-6106-gef26c151c14a8717 Date: Fri, 01 Jul 2022 08:20:11 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: ice-on-valid-code X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: ASSIGNED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: roger at nextmovesoftware dot com X-Bugzilla-Target-Milestone: 12.2 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Jul 2022 08:20:11 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106122 --- Comment #3 from CVS Commits --- The master branch has been updated by Roger Sayle : https://gcc.gnu.org/g:17419b61edd350147b0cc10c3da0b8461e51a42c commit r13-1380-g17419b61edd350147b0cc10c3da0b8461e51a42c Author: Roger Sayle Date: Fri Jul 1 09:18:07 2022 +0100 PR target/106122: Don't update %esp via the stack with -Oz on x86. When optimizing for size with -Oz, setting a register can be minimized = by pushing an immediate value to the stack and popping it to the destinati= on. Alas the one general register that shouldn't be updated via the stack is the stack pointer itself, where "pop %esp" can't be represented in GCC's RTL ("use of a register mentioned in pre_inc, pre_dec, post_inc or post_dec is not permitted within the same instruction"). This patch fixes PR target/106122 by explicitly checking for SP_REG in the problematic peephole2. 2022-07-01 Roger Sayle gcc/ChangeLog PR target/106122 * config/i386/i386.md (peephole2): Avoid generating pop %esp when optimizing for size. gcc/testsuite/ChangeLog PR target/106122 * gcc.target/i386/pr106122.c: New test case.=