From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id EB62B3858412; Mon, 11 Jul 2022 12:41:57 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EB62B3858412 From: "rguenth at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/106240] [13 Regression] missed vectorization opportunity (cond move) on mips since r13-707-g68e0063397ba82 Date: Mon, 11 Jul 2022 12:41:57 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: rguenth at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 13.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cf_reconfirmed_on everconfirmed component cc bug_status Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 Jul 2022 12:41:58 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106240 Richard Biener changed: What |Removed |Added ---------------------------------------------------------------------------- Last reconfirmed| |2022-07-11 Ever confirmed|0 |1 Component|tree-optimization |target CC| |mfortune at gmail dot com Status|UNCONFIRMED |NEW --- Comment #1 from Richard Biener --- So we're going t.c:9:17: note: using normal nonmask vectors for _11 =3D _1 =3D=3D _3; t.c:9:17: note: can narrow to unsigned:5 without loss of precision: i_9 = =3D i_12 + 1; t.c:9:17: note: vect_recog_bool_pattern: detected: iftmp.0_5 =3D _11 ? _1= : _2; t.c:9:17: note: bool pattern recognized: patt_10 =3D _11 !=3D 0 ? _1 : _2; .. t.c:9:17: note: =3D=3D> examining statement: _11 =3D _1 =3D=3D _3; t.c:10:36: missed: not vectorized: relevant stmt not supported: _11 =3D _= 1 =3D=3D _3; t.c:9:17: missed: bad operation or unsupported loop bound. > grep 'vcond\|vec_cmp' *.md mips-msa.md:;; Same as MSA. Used by vcond to iterate two modes. mips-msa.md:(define_expand "vcondu" mips-msa.md:(define_expand "vcond" mips-msa.md:(define_expand "vec_cmp" mips-msa.md: mips_expand_vec_cmp_expr (operands); mips-msa.md:(define_expand "vec_cmpu" mips-msa.md: mips_expand_vec_cmp_expr (operands); mips-ps-3d.md:(define_expand "vcondv2sfv2sf" mips-ps-3d.md: mips_expand_vcondv2sf (operands[0], operands[1], operands[2= ], mips-ps-3d.md: mips_expand_vcondv2sf (operands[0], operands[1], operands[2= ], mips-ps-3d.md: mips_expand_vcondv2sf (operands[0], operands[1], operands[2= ], so we have limited support for vec_cmp and no support for vcond_mask. Generally I'd blame it on the target to not provide optabs that map to the actual ISA. Before the rev. we produced $L2: ldc1 $f1,0($4) ldc1 $f0,0($2) addiu $3,$3,8 add.ps $f2,$f1,$f3 addiu $2,$2,8 addiu $4,$4,8 c.eq.ps $fcc0,$f0,$f2 movf.ps $f0,$f1,$fcc0 .set noreorder .set nomacro bne $2,$5,$L2 I think c.eq.ps $fcc0,$f0,$f2 movf.ps $f0,$f1,$fcc0 corresponds to _34 =3D vect__1.8_28 =3D=3D vect__3.12_33; vect_iftmp.13_35 =3D VEC_COND_EXPR <_34, vect__1.8_28, vect__2.11_31>; and ISEL makes vect_iftmp.13_35 =3D .VCOND (vect__1.8_28, vect__3.12_33, vect__1.8_28, vect__2.11_31, 113); so while the target supports vcond the actual ISA has vec_cmp plus vcond_mask instead which would map to the new GIMPLE IL constraints nicely. But indeed for targets where the ISA can do VCOND we mess this up during pattern recognition, making "fixup" in vectorizable_* difficult. It would possibly be best to emulate ISEL here and pattern-recog iftmp.0_5 =3D _1 =3D=3D _3 ? _1 : _2; instead (yeah, embedded GENERIC cond - patterns still have those - they probably should use "unchecked" .VCOND but with scalar ops ...). I'm not sure how likely is a MIPS maintainer modernizing the vectorizer patterns here? What's the "modern" parts? mips-msa.md or mips-ps-3d.md?=