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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug target/106277] missed-optimization: redundant movzx
Date: Wed, 13 Jul 2022 15:49:52 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106277

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2022-07-13
     Ever confirmed|0                           |1

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Because the RTL does not describe the load is zero-extended to SI:
(insn 9 8 10 2 (set (reg:QI 91 [ *b_6(D) ])
        (mem:QI (reg:DI 93) [0 *b_6(D)+0 S1 A8])) "/app/example.cpp":4:31 85
{*movqi_internal}
     (expr_list:REG_DEAD (reg:DI 93)
        (nil)))
(insn 10 9 11 2 (parallel [
            (set (reg:QI 89)
                (plus:QI (mem:QI (reg:DI 92) [0 *a_5(D)+0 S1 A8])
                    (reg:QI 91 [ *b_6(D) ])))
            (clobber (reg:CC 17 flags))
        ]) "/app/example.cpp":4:31 235 {*addqi_1}
     (expr_list:REG_DEAD (reg:DI 92)
        (expr_list:REG_UNUSED (reg:CC 17 flags)
            (expr_list:REG_DEAD (reg:QI 91 [ *b_6(D) ])
                (nil)))))
(insn 11 10 16 2 (set (reg:SI 88)
        (zero_extend:SI (reg:QI 89))) "/app/example.cpp":4:35 152
{*zero_extendqisi2}
     (expr_list:REG_DEAD (reg:QI 89)
        (nil)))

That is why.=