From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 1EB153858400; Sat, 16 Jul 2022 09:55:03 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1EB153858400 From: "zhongyunde at huawei dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug c/106323] New: [Suboptimal] memcmp(s1, s2, n) == 0 expansion on AArch64 compare to llvm Date: Sat, 16 Jul 2022 09:55:02 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: c X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: zhongyunde at huawei dot com X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: bug_id short_desc product version bug_status bug_severity priority component assigned_to reporter target_milestone Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 16 Jul 2022 09:55:03 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106323 Bug ID: 106323 Summary: [Suboptimal] memcmp(s1, s2, n) =3D=3D 0 expansion on AArch64 compare to llvm Product: gcc Version: 13.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: c Assignee: unassigned at gcc dot gnu.org Reporter: zhongyunde at huawei dot com Target Milestone: --- test case, see detail https://gcc.godbolt.org/z/PM3jxEM9M ``` #include int src(char* s1, char* s2) {=20 return memcmp(s1, s2, 3) =3D=3D 0;=20 } ``` * llvm doesn't emit branch with instruction cset ``` src: // @src ldrh w8, [x0] ldrh w9, [x1] ldrb w10, [x0, #2] ldrb w11, [x1, #2] eor w8, w8, w9 eor w9, w10, w11 orr w8, w8, w9 cmp w8, #0 cset w0, eq ret ``` * gcc ``` src: ldrh w3, [x0] ldrh w2, [x1] cmp w3, w2 beq .L5 .L2: mov w0, 1 eor w0, w0, 1 ret .L5: ldrb w2, [x0, 2] ldrb w0, [x1, 2] cmp w2, w0 bne .L2 mov w0, 0 eor w0, w0, 1 ret ```=