[Bug target/106346] [11/12/13/14 Regression] Potential regression on vectorization of left shift with constants since r11-5160-g9fc9573f9a5e94

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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106346

--- Comment #8 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Tamar Christina <tnfchris@gcc.gnu.org>:

https://gcc.gnu.org/g:451391a6477f5b012faeca42cdba1bfb8e6eecc0

commit r14-2991-g451391a6477f5b012faeca42cdba1bfb8e6eecc0
Author: Tamar Christina <tamar.christina@arm.com>
Date:   Fri Aug 4 13:49:23 2023 +0100

    AArch64: Undo vec_widen_<sur>shiftl optabs [PR106346]

    In GCC 11 we implemented the vectorizer optab for widening left shifts,
    however this optab is only supported for uniform shift constants.

    At the moment GCC still has two loop vectorization strategy (classical loop
and
    SLP based loop vec) and the optab is implemented as a scalar pattern.

    This means that when we apply it to a non-uniform constant inside a loop we
only
    find out during SLP build that the constants aren't uniform.  At this point
it's
    too late and we lose SLP entirely.

    Over the years I've tried various options but none of it works well:

    1. Dissolving patterns during SLP built (problematic, also dissolves them
for
    non-slp).
    2. Optionally ignoring patterns for SLP build (problematic, ends up
interfearing
    with relevancy detection).
    3. Relaxing contraint on SLP build to allow non-constant values and
dissolving
    them after SLP build using an SLP pattern.  (problematic, ends up breaking
    shift reassociation).

    As a result we've concluded that for now this pattern should just be
removed
    and formed during RTL.

    The plan is to move this to an SLP only pattern once we remove classical
loop
    vectorization support from GCC, at which time we can also properly support
SVE's
    Top and Bottom variants.

    This removes the optab and reworks the RTL to recognize both the vector
variant
    and the intrinsics variant.  Also just simplifies all these patterns.

    gcc/ChangeLog:

            PR target/106346
            * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
            vec_widen_<sur>shiftl_hi_<mode>): Remove.
            (aarch64_<sur>shll<mode>_internal): Renamed to...
            (aarch64_<su>shll<mode>): .. This.
            (aarch64_<sur>shll2<mode>_internal): Renamed to...
            (aarch64_<su>shll2<mode>): .. This.
            (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
            optabs.
            * config/aarch64/constraints.md (D2, DL): New.
            * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.

    gcc/testsuite/ChangeLog:

            PR target/106346
            * gcc.target/aarch64/pr98772.c: Adjust assembly.
            * gcc.target/aarch64/vect-widen-shift.c: New test.