[Bug rtl-optimization/106419] ICE in lra_assign, at lra-assigns.cc:1649

["linkw at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106419

Kewen Lin <linkw at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |bergner at gcc dot gnu.org,
                   |                            |segher at gcc dot gnu.org,
                   |                            |vmakarov at gcc dot gnu.org

--- Comment #6 from Kewen Lin <linkw at gcc dot gnu.org> ---
>From the ICE point:

  if (! lra_hard_reg_split_p && ! lra_asm_error_p && flag_checking)
    /* Check correctness of allocation but only when there are no hard reg
       splits and asm errors as in the case of errors explicit insns involving
       hard regs are added or the asm is removed and this can result in
       incorrect allocation.  */
    for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
      if (lra_reg_info[i].nrefs != 0
          && reg_renumber[i] >= 0
          && overlaps_hard_reg_set_p (lra_reg_info[i].conflict_hard_regs,
                                      PSEUDO_REGNO_MODE (i), reg_renumber[i]))
        gcc_unreachable ();

this is similar to PR97978. I commented out the line gcc_unreachable(), the
resulted assembly looks fine to me. It's able to spill the value into one stack
slot, it's reloaded after the second indirect call (though the code is very
poor but it's at -Og).

        mr 3,14      // ctr doesn't conflict with r3
        mfctr 9
        mtctr 9
        stw 9,36(1)  // saved
        crxor 6,6,6
        bctrl
        mr 5,18
        lwz 7,160(1)
        mr 4,7
        lwz 6,152(1)
        mr 3,6
        lwz 12,28(1)
        mtctr 12
        crxor 6,6,6
        bctrl
        lfs 0,.LC2@l(31)
        lfs 12,0(24)
        fcmpu 0,12,0
        lwz 12,28(1)
        lwz 6,152(1)
        lwz 7,160(1)
        lwz 9,36(1)  // reload
        mtctr 9      // make it live in ctr

IMHO, this is very likely a LRA issue, maybe the assert condition is too
strict.