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From: "vineetg at rivosinc dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/106602] riscv: suboptimal codegen for
 zero_extendsidi2_shifted w/o bitmanip
Date: Tue, 01 Nov 2022 20:31:13 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106602

--- Comment #9 from Vineet Gupta <vineetg at rivosinc dot com> ---
(In reply to Jeffrey A. Law from comment #7)
> There's some code in combine that's supposed to take advantage of REG_EQU=
AL
> notes which is supposed to help with this kind of scenario.  Digging into
> that might help.

Awesome, thx for the pointer Jeff.=20

Indeed combine has a note processing fallback in the end. RV backend is got
generating a note for the const split case (1 << 38). Let me see if I can f=
ix
that.=