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From: "vineetg at rivosinc dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/106602] riscv: suboptimal codegen for
 zero_extendsidi2_shifted w/o bitmanip
Date: Thu, 03 Nov 2022 20:41:53 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106602

--- Comment #22 from Vineet Gupta <vineetg at rivosinc dot com> ---
(In reply to Vineet Gupta from comment #21)


> However=20
>  try_combine
>     recog_for_combine
>       recog_for_combine_1
>          recog( )
>=20
> is failing and we get "Failed to recognize..."

False alarm: In a different successful split case, recog() does fail initia=
lly
too. I see split_insns correctly returning the first shift-right.

  (insn 22 0 23 (set (reg:DI 77)
        (lshiftrt:DI (reg:DI 76)
            (const_int 6 [0x6]))) -1
     (nil))

debugging....=