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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug testsuite/106690] check_effective_target_bswap should be
 enabled for riscv if ZBB ISA extension is enabled
Date: Wed, 24 Aug 2022 18:31:31 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106690

--- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The trunk branch has been updated by Andrew Pinski <pinskia@gcc.gnu.org>:

https://gcc.gnu.org/g:dec5faa2b2f0d311daa6defd4b4f3c1965748ddf

commit r13-2180-gdec5faa2b2f0d311daa6defd4b4f3c1965748ddf
Author: Andrew Pinski <apinski@marvell.com>
Date:   Fri Aug 19 22:09:30 2022 +0000

    Fix PR 106690: enable effective_target_bswap for RISCV targets with ZBB
enabled by default

    While looking for testcases to quickly test, I Noticed that
    check_effective_target_bswap was not enabled for riscv when
    ZBB is enabled. This patch checks if ZBB is enabled when
    targeting RISCV* for bswap.

    OK? Ran the testsuite for riscv32-linux-gnu both with and without ZBB
enabled.

    PR testsuite/106690
    gcc/testsuite/ChangeLog:

            * lib/target-supports.exp (check_effective_target_bswap):
            Return true if riscv and ZBB ISA extension is enabled.=