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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/106818] riscv produces bad low_sum while doing expansion
 of strict aligned stores/load
Date: Fri, 21 Oct 2022 16:31:05 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106818

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2022-10-21
             Status|UNCONFIRMED                 |NEW
            Summary|code is genereated          |riscv produces bad low_sum
                   |differently with or without |while doing expansion of
                   |'extern'                    |strict aligned stores/load
          Component|middle-end                  |target
     Ever confirmed|0                           |1
           Keywords|missed-optimization         |wrong-code

--- Comment #11 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
So on aarch64 with -O3 -mstrict-align we produce:

        adrp    x1, array
        add     x0, x1, :lo12:array
        mov     w2, 10
        strb    w2, [x1, #:lo12:array]
        strb    wzr, [x0, 1]
        strb    wzr, [x0, 2]
        strb    wzr, [x0, 3]

PowerPC has a similar output as aarch64 here too.

Which means this is a target issue where low_sum is being combined with the=
 add
when it should not be.

Confirmed for riscv.

It happens at expand time:
(insn 15 14 16 (set (mem/c:QI (lo_sum:DI (reg:DI 72)
                (symbol_ref:DI ("array") [flags 0xc4]  <var_decl 0x7f347a4c=
51b0
array>)) [1 MEM[(struct sss_t *)&array].i+0 S1 A8])
        (reg:QI 78)) "/app/example.cpp":10:10 -1
     (nil))

(insn 16 15 17 (set (reg:DI 80)
        (zero_extend:DI (mem/c:QI (lo_sum:DI (reg:DI 72)
                    (const:DI (plus:DI (symbol_ref:DI ("array") [flags 0xc4=
]=20
<var_decl 0x7f347a4c51b0 array>)
                            (const_int 1 [0x1])))) [1 MEM[(struct sss_t
*)&array].i+1 S1 A8]))) "/app/example.cpp":10:10 -1
     (nil))

Note the alignment is causing the difference in doing the expansion or one
store but then the wrong code is due to the backend expansion of the address
incorrectly.

ARM64 (and powerpc) expansion produces:
(insn 18 17 19 (set (reg:QI 101)
        (mem/c:QI (plus:DI (reg/f:DI 92)
                (const_int 1 [0x1])) [1 MEM[(struct sss_t *)&array].i+1 S1
A8])) "/app/example.cpp":10:10 -1
     (nil))

Notice the 92 rather than the low_sum part.=