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From: "vineetg at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/106888] [RISCV] Negative optimization that
 excess andi instructions are generated  in gcc.dg/pr90838.c
Date: Fri, 21 Apr 2023 21:18:12 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106888

--- Comment #7 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
(In reply to Roger Sayle from comment #5)
> Created attachment 54905 [details]
> proposed patch
>=20
> This patch should fix this problem, by adding another pattern the machine
> description to also recognize zero_extend of clz/ctz/pcnt, matching the
> current pattern that only matches sign_extend.  Clearly for SI operands, =
the
> result must always be 0..32, so sign extension and zero extension are
> equivalent, and the zero extension is perhaps (now) the preferred canonic=
al
> form.

Thx for the patch Roger, but as Jeff noted, it alone is not enough and
generates same extra ANDI. Would you have expected combine to recog() the n=
ew
pattern ?=