From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-bugzilla@gcc.gnu.org>
Received: by sourceware.org (Postfix, from userid 48)
	id E108C3858401; Thu, 20 Apr 2023 23:06:03 +0000 (GMT)
DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E108C3858401
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org;
	s=default; t=1682031963;
	bh=+pxer2XHL0jrxv6pXLJYAw3JtIR1q69aXiLT8kZHDow=;
	h=From:To:Subject:Date:In-Reply-To:References:From;
	b=Vc8llEUW61v+zKnT1DCRgIkOajYYyE2b3PANTdsFWcrb/3rpECiASeva+0uczpIcU
	 5zSjbpS2K0c8xVBkaDgcrcPJhGZEZbvjsf6hiAVJ+/cgtn4E8b+0MMAnq68BXp5Wi2
	 kWrOSe+g20mN+fu3QIeqqOh7h+xTVz5b5WV+9SGo=
From: "vineetg at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/106888] [RISCV] Negative optimization that
 excess andi instructions are generated  in gcc.dg/pr90838.c
Date: Thu, 20 Apr 2023 23:06:03 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: tree-optimization
X-Bugzilla-Version: 13.0
X-Bugzilla-Keywords: 
X-Bugzilla-Severity: normal
X-Bugzilla-Who: vineetg at gcc dot gnu.org
X-Bugzilla-Status: UNCONFIRMED
X-Bugzilla-Resolution: 
X-Bugzilla-Priority: P3
X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org
X-Bugzilla-Target-Milestone: ---
X-Bugzilla-Flags: 
X-Bugzilla-Changed-Fields: 
Message-ID: <bug-106888-4-wvdiQaefjh@http.gcc.gnu.org/bugzilla/>
In-Reply-To: <bug-106888-4@http.gcc.gnu.org/bugzilla/>
References: <bug-106888-4@http.gcc.gnu.org/bugzilla/>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/
Auto-Submitted: auto-generated
MIME-Version: 1.0
List-Id: <gcc-bugs.sourceware.org>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D106888

--- Comment #3 from Vineet Gupta <vineetg at gcc dot gnu.org> ---
Debugging of ctz3 case

The insns of interest are:

insn_cost 4 for     6: r74:SI=3Dctz(r73:DI#0)
      REG_DEAD r73:DI
insn_cost 4 for     7: r72:DI=3Dsign_extend(r74:SI)
      REG_DEAD r74:SI

Before the commit in question, combine is able to mush them

allowing combination of insns 6 and 7
original costs 4 + 4 =3D 8
replacement cost 8
deferring deletion of insn with uid =3D 6.
modifying insn i3     7: r72:DI=3Dsign_extend(ctz(r76:DI#0))

With the commit in questions, it takes the new code patch introduced

combine_simplify_rtx

   simplify_context::simplify_unary_operation_1
      case SIGN_EXTEND
+         if (val_signbit_known_clear_p
+             simplify_gen_unary (ZERO_EXTEND, mode, op, GET_MODE (op));

   return expand_compound_operation (x);  // x is ZERO_EXTEND now=