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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/107057] [10/11/12/13 Regression] ICE in
 extract_constrain_insn, at recog.cc:2692
Date: Tue, 01 Nov 2022 05:34:52 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D107057

--- Comment #10 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:4acc4c2be84d66075d60736623c3a7134d129eaa

commit r13-3587-g4acc4c2be84d66075d60736623c3a7134d129eaa
Author: liuhongt <hongtao.liu@intel.com>
Date:   Tue Oct 25 17:10:23 2022 +0800

    Fix incorrect digit constraint

    Matching constraints are used in these circumstances. More precisely,
    the two operands that match must include one input-only operand and
    one output-only operand. Moreover, the digit must be a smaller number
    than the number of the operand that uses it in the constraint.

    In pr107057, the 2 operands in the pattern are both input operands.

    gcc/ChangeLog:

            PR target/107057
            * config/i386/sse.md (*vec_interleave_highv2df): Remove
            constraint 1.
            (*vec_interleave_lowv2df): Ditto.
            (vec_concatv2df): Ditto.
            (*avx512f_unpcklpd512<mask_name>): Ditto and renamed to ..
            (avx512f_unpcklpd512<mask_name>): .. this.
            (avx512f_movddup512<mask_name>): Change to define_insn.
            (avx_movddup256<mask_name>): Ditto.
            (*avx_unpcklpd256<mask_name>): Remove constraint 1 and renamed
            to ..
            (avx_unpcklpd256<mask_name>): .. this.
            * config/i386/i386.cc (ix86_vec_interleave_v2df_operator_ok):
            Disallow MEM_P (op1) && MEM_P (op2).

    gcc/testsuite/ChangeLog:

            * gcc.target/i386/pr107057.c: New test.=