From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id BB15338460AB; Thu, 27 Oct 2022 18:42:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BB15338460AB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1666896170; bh=rhGMsTi/aoGTWwbLAnhYnSK3EymHWBuIfyBvCsc6hOs=; h=From:To:Subject:Date:In-Reply-To:References:From; b=nHnXuL8OQEBHXizk/kidgw5ulEuZXL0kQXekIhv8spfZkLa8E7Xf8gzWBUQZ3LTBU dybfKme2tKCTHFngU6/OsGQE4PQbVGoB/ykeDhn6TJhf34/2GDmYe/IOm361V9XAoN ogRxn3xgFXtK9reW3HM+Ctz2SXZILfFTXrYrHah0= From: "cvs-commit at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/107172] [13 Regression] wrong code with "-O1 -ftree-vrp" on x86_64-linux-gnu since r13-1268-g8c99e307b20c502e Date: Thu, 27 Oct 2022 18:42:48 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: cvs-commit at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 13.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D107172 --- Comment #46 from CVS Commits --- The master branch has been updated by H.J. Lu : https://gcc.gnu.org/g:0e36a9c6915c713d30016cbade97a4b31dcc1350 commit r13-3530-g0e36a9c6915c713d30016cbade97a4b31dcc1350 Author: H.J. Lu Date: Thu Oct 20 11:55:19 2022 -0700 x86: Replace ne:CCC/ne:CCO with UNSPEC_CC_NE in neg patterns In i386.md, neg patterns which set MODE_CC register like (set (reg:CCC FLAGS_REG) (ne:CCC (match_operand:SWI48 1 "general_reg_operand") (const_int 0= ))) can lead to errors when operand 1 is a constant value. If FLAGS_REG in (set (reg:CCC FLAGS_REG) (ne:CCC (const_int 2) (const_int 0))) is set to 1, RTX simplifiers may simplify (set (reg:SI 93) (neg:SI (ltu:SI (reg:CCC 17 flags) (const_int 0 [0])))) as (set (reg:SI 93) (neg:SI (ltu:SI (const_int 1) (const_int 0 [0])))) which leads to incorrect results since LTU on MODE_CC register isn't the same as "unsigned less than" in x86 backend. To prevent RTL optimizers from setting MODE_CC register to a constant, use UNSPEC_CC_NE to replace ne:CCC/ne:CCO when setting FLAGS_REG in neg patterns. gcc/ PR target/107172 * config/i386/i386.md (UNSPEC_CC_NE): New. Replace ne:CCC/ne:CCO with UNSPEC_CC_NE in neg patterns. gcc/testsuite/ PR target/107172 * gcc.target/i386/pr107172.c: New test.=