From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id D857138582B1; Mon, 10 Oct 2022 19:16:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D857138582B1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1665429397; bh=iYa8otp2rAv3TOTc1pqNgECS8TrFuzHzjUElMdCTMTk=; h=From:To:Subject:Date:In-Reply-To:References:From; b=NlsVdkNjS2DYa6skgXERc3mJX/FVwQqe4z4YicvajndufpB4iSgLOYslCeSYHoq3P Zx6Ri/xFsak2KH+nNZLcefRI14hNzQsaND7Xx9Z2WuPjq0jCCygNqjUOQRpzRH7JEr 4kOS+Tn1VL1TPbyzoYybaNJDeJoqkcQvNPQIDjM0= From: "hjl.tools at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/107172] [13 Regression] wrong code with "-O1 -ftree-vrp" on x86_64-linux-gnu since r13-1268-g8c99e307b20c502e Date: Mon, 10 Oct 2022 19:16:16 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.0 X-Bugzilla-Keywords: wrong-code X-Bugzilla-Severity: normal X-Bugzilla-Who: hjl.tools at gmail dot com X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P1 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 13.0 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D107172 --- Comment #9 from H.J. Lu --- (In reply to Segher Boessenkool from comment #7) > Please show the (relevant part of) output of -fdump-rtl-combine-all ? At > least > those parts where it decided (ltu:SI (const_int 1) (const_int 0)) is valid > (it > isn't) and where optimising that to (const_int 0) is valid (it isn't). Trying 6, 62 -> 63: 6: r87:SI=3D0x2 62: {flags:CCC=3Dr87:SI!=3D0;r96:SI=3D-r87:SI;} REG_DEAD r87:SI REG_UNUSED r96:SI 63: {r97:SI=3D-ltu(flags:CCC,0);clobber flags:CC;} REG_DEAD flags:CCC REG_UNUSED flags:CC Failed to match this instruction: (parallel [ (set (reg:SI 97) (const_int 0 [0])) (clobber (reg:CC 17 flags)) (set (reg:SI 96) (const_int -2 [0xfffffffffffffffe])) ]) Failed to match this instruction: (parallel [ (set (reg:SI 97) (const_int 0 [0])) (set (reg:SI 96) (const_int -2 [0xfffffffffffffffe])) ]) Successfully matched this instruction: (set (reg:SI 96) (const_int -2 [0xfffffffffffffffe])) Successfully matched this instruction: (set (reg:SI 97) (const_int 0 [0])) allowing combination of insns 6, 62 and 63 original costs 4 + 0 + 8 =3D 0 replacement costs 4 + 4 =3D 8 deferring deletion of insn with uid =3D 62. deferring deletion of insn with uid =3D 6. modifying insn i2 62: r96:SI=3D0xfffffffffffffffe deferring rescan insn with uid =3D 62. modifying insn i3 63: r97:SI=3D0 deferring rescan insn with uid =3D 63.=